From: "David S. Miller" <davem@redhat.com>
To: Alan Cox <alan@lxorguk.ukuu.org.uk>
Cc: Jeff Garzik <jgarzik@pobox.com>,
Margit Schubert-While <margitsw@t-online.de>,
Linux Kernel Mailing List <linux-kernel@vger.kernel.org>
Subject: Re: PCI cache line messages 2.4/2.5
Date: 05 Jun 2003 04:05:58 -0700 [thread overview]
Message-ID: <1054811157.19407.3.camel@rth.ninka.net> (raw)
In-Reply-To: <1054809554.15276.8.camel@dhcp22.swansea.linux.org.uk>
On Thu, 2003-06-05 at 03:39, Alan Cox wrote:
> > Your BIOS did not set the PCI cache line size correctly. The kernel
> > caught that mistake, and fixed it.
>
> I can't find anywhere the BIOS is obliged to set it for you if a PnP OS
> is installed, ditto in the presence of any form of hotplug the test is
> wrong.
>
> As far as I can see you can only warn if MWI is already set in the
> control word, and (I'd have to check the spec) possibly if the
> cache line size is non zero.
I don't know how PnP OS plays into it, but the last time I dug into this
deep dark area, the BIOS was expected to setup the cache line size for
all PCI devices in the system.
I do specifically remember situations, involving Acenic cards, where
one Acenic card would have things setup correctly but for whatever
reason the BIOS decided not to init the other Acenic cards.
--
David S. Miller <davem@redhat.com>
next prev parent reply other threads:[~2003-06-05 10:52 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2003-06-02 6:59 Margit Schubert-While
2003-06-04 22:39 ` Jeff Garzik
2003-06-05 10:39 ` Alan Cox
2003-06-05 11:05 ` David S. Miller [this message]
2003-06-05 11:20 ` Alan Cox
2003-06-05 11:25 ` David S. Miller
2003-06-05 19:48 ` Alan Cox
2003-06-06 5:11 ` David S. Miller
2003-06-06 15:27 ` Alan Cox
2003-06-06 15:30 ` David S. Miller
2003-06-05 6:12 Margit Schubert-While
2003-06-05 11:58 ` Ivan Kokshaysky
2003-06-05 15:23 Margit Schubert-While
2003-06-06 12:06 ` Ivan Kokshaysky
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