[PATCH v1 0/3] ASoC: qcom: split out self-contained Hawi/Maili audio changes

[PATCH v1 0/3] ASoC: qcom: split out self-contained Hawi/Maili audio changes

[Prasad Kumpatla]

Hi,

This series extracts a small set of self-contained patches from the earlier
Hawi/Maili LPASS audio submission to simplify review and reduce dependencies.

Link:
https://lore.kernel.org/all/20260923084627.748920-1-prasad.kumpatla@oss.qualcomm.com/

The original submission included changes that depend on LPASS macro codec and
platform updates still progressing through their respective trees. This series
contains only patches that are independent of those changes and apply cleanly
on current linux-next.

  patch-1:
    Reset I2S/TDM, clock-source and bandgap override registers during
    hw_free() to ensure reliable amplifier bring-up across consecutive streams.

  patch-2:
    Add maili_priv_data with driver_name set to "maili" so the correct
    topology is loaded from the maili firmware directory.

  patch-3:
    Enable the Hawi LPASS LPI pinctrl driver in arm64 defconfig. Both Hawi
    and Maili rely on this driver for LPASS LPI GPIO control.

The remaining patches from the earlier submission will be reposted separately
once their dependencies are available in the appropriate maintainer trees.

Prasad Kumpatla (3):
  ASoC: codecs: wsa885x: Reset registers on teardown for B2B playback
  ASoC: qcom: sc8280xp: add Maili sound card configuration
  arm64: defconfig: Enable Hawi LPASS LPI pinctrl driver

 arch/arm64/configs/defconfig |  1 +
 sound/soc/codecs/wsa885x.c   | 11 ++++++++++-
 sound/soc/qcom/sc8280xp.c    | 11 ++++++++++-
 3 files changed, 21 insertions(+), 2 deletions(-)

-- 
2.34.1

[PATCH v1 1/3] ASoC: codecs: wsa885x: Reset registers on teardown for B2B playback

[Prasad Kumpatla]

During back-to-back speaker playback the PA sometimes fails to enable
because a few I2S/TDM and clock source registers retain their previous
state and are not reprogrammed on the next stream.

Reset the relevant I2S/TDM, clock source and bandgap override registers
in hw_free() so the codec is torn down cleanly and the speaker amplifier
comes up reliably on back-to-back use cases. Move the bandgap override
reset out of set_sysclk() into the teardown path where it belongs.

Signed-off-by: Prasad Kumpatla <prasad.kumpatla@oss.qualcomm.com>
---
 sound/soc/codecs/wsa885x.c | 11 ++++++++++-
 1 file changed, 10 insertions(+), 1 deletion(-)

diff --git a/sound/soc/codecs/wsa885x.c b/sound/soc/codecs/wsa885x.c
index 1faa8541a872..5ffbf9e89fd9 100644
--- a/sound/soc/codecs/wsa885x.c
+++ b/sound/soc/codecs/wsa885x.c
@@ -896,7 +896,6 @@ static int wsa885x_codec_set_sysclk(struct snd_soc_dai *dai, int clk_id,
 
 	regmap_write(wsa885x->regmap, WSA885X_DIG_CTRL0_SYS_CLK_SEL, 0x00);
 	regmap_write(wsa885x->regmap, WSA885X_DIG_CTRL0_POWER_FSM_CTL1, 0x01);
-	regmap_write(wsa885x->regmap, WSA885X_ANA_TOP_BG_TVP_OVRD_CTL, 0x00);
 
 	return 0;
 }
@@ -1006,6 +1005,16 @@ static int wsa885x_codec_hw_free(struct snd_pcm_substream *substream,
 				 struct snd_soc_dai *dai)
 {
 	static const struct reg_sequence regs[] = {
+		{ WSA885X_DIG_CTRL1_I2S_RESET_CTL, 0x00 },
+		{ WSA885X_DIG_CTRL1_I2S_CFG0_TDM_TX, 0x00 },
+		{ WSA885X_DIG_CTRL1_I2S_CFG1_TDM_TX, 0x00 },
+		{ WSA885X_DIG_CTRL1_I2S_TDM_CTL1, 0x05 },
+		{ WSA885X_DIG_CTRL1_I2S_TDM_CTL0, 0x00 },
+		{ WSA885X_DIG_CTRL1_I2S_TDM_CH_TX, 0x00 },
+		{ WSA885X_DIG_CTRL1_I2S_CTL0, 0x06 },
+		{ WSA885X_DIG_CTRL1_I2S_TDM_CH_RX, 0x08 },
+		{ WSA885X_DIG_CTRL0_CLK_SOURCE_ENABLE, 0x00 },
+		{ WSA885X_ANA_TOP_BG_TVP_OVRD_CTL, 0x00 },
 		{ WSA885X_DIG_CTRL0_PA_FSM_CTL, 0x00 },
 	};
 	struct wsa885x_priv *wsa885x;
-- 
2.34.1

Re: [PATCH v1 1/3] ASoC: codecs: wsa885x: Reset registers on teardown for B2B playback

[Ajay Kumar Nandam]

On 10/6/2026 11:07 AM, Prasad Kumpatla wrote:
> During back-to-back speaker playback the PA sometimes fails to enable
> because a few I2S/TDM and clock source registers retain their previous
> state and are not reprogrammed on the next stream.
> 
> Reset the relevant I2S/TDM, clock source and bandgap override registers
> in hw_free() so the codec is torn down cleanly and the speaker amplifier
> comes up reliably on back-to-back use cases. Move the bandgap override
> reset out of set_sysclk() into the teardown path where it belongs.
> 
> Signed-off-by: Prasad Kumpatla <prasad.kumpatla@oss.qualcomm.com>
> ---
>   sound/soc/codecs/wsa885x.c | 11 ++++++++++-
>   1 file changed, 10 insertions(+), 1 deletion(-)
> 
> diff --git a/sound/soc/codecs/wsa885x.c b/sound/soc/codecs/wsa885x.c
> index 1faa8541a872..5ffbf9e89fd9 100644
> --- a/sound/soc/codecs/wsa885x.c
> +++ b/sound/soc/codecs/wsa885x.c
> @@ -896,7 +896,6 @@ static int wsa885x_codec_set_sysclk(struct snd_soc_dai *dai, int clk_id,
>   
>   	regmap_write(wsa885x->regmap, WSA885X_DIG_CTRL0_SYS_CLK_SEL, 0x00);
>   	regmap_write(wsa885x->regmap, WSA885X_DIG_CTRL0_POWER_FSM_CTL1, 0x01);
> -	regmap_write(wsa885x->regmap, WSA885X_ANA_TOP_BG_TVP_OVRD_CTL, 0x00);
>   
>   	return 0;
>   }
> @@ -1006,6 +1005,16 @@ static int wsa885x_codec_hw_free(struct snd_pcm_substream *substream,
>   				 struct snd_soc_dai *dai)
>   {
>   	static const struct reg_sequence regs[] = {
> +		{ WSA885X_DIG_CTRL1_I2S_RESET_CTL, 0x00 },
> +		{ WSA885X_DIG_CTRL1_I2S_CFG0_TDM_TX, 0x00 },
> +		{ WSA885X_DIG_CTRL1_I2S_CFG1_TDM_TX, 0x00 },
> +		{ WSA885X_DIG_CTRL1_I2S_TDM_CTL1, 0x05 },
> +		{ WSA885X_DIG_CTRL1_I2S_TDM_CTL0, 0x00 },
> +		{ WSA885X_DIG_CTRL1_I2S_TDM_CH_TX, 0x00 },
> +		{ WSA885X_DIG_CTRL1_I2S_CTL0, 0x06 },
> +		{ WSA885X_DIG_CTRL1_I2S_TDM_CH_RX, 0x08 },
> +		{ WSA885X_DIG_CTRL0_CLK_SOURCE_ENABLE, 0x00 },
> +		{ WSA885X_ANA_TOP_BG_TVP_OVRD_CTL, 0x00 },


This moves the BG_TVP override clear from immediately after a successful 
PLL lock to hw_free(), so WSA885X_ANA_TOP_BG_TVP_OVRD_CTL appears to 
remain at 0x03 for the lifetime of the active stream.

Is that intentional for the back-to-back playback fix? If the override 
is only needed during PLL programming/lock, keeping the old immediate 
clear and also resetting it during hw_free() would preserve the existing 
active-stream behavior while still cleaning up the teardown path.

Thanks
Ajay Kumar Nandam


>   		{ WSA885X_DIG_CTRL0_PA_FSM_CTL, 0x00 },
>   	};
>   	struct wsa885x_priv *wsa885x;

Re: [PATCH v1 1/3] ASoC: codecs: wsa885x: Reset registers on teardown for B2B playback

[Prasad Kumpatla]

On 10/6/2026 2:03 PM, Ajay Kumar Nandam wrote:
>
>
> On 10/6/2026 11:07 AM, Prasad Kumpatla wrote:
>> During back-to-back speaker playback the PA sometimes fails to enable
>> because a few I2S/TDM and clock source registers retain their previous
>> state and are not reprogrammed on the next stream.
>>
>> Reset the relevant I2S/TDM, clock source and bandgap override registers
>> in hw_free() so the codec is torn down cleanly and the speaker amplifier
>> comes up reliably on back-to-back use cases. Move the bandgap override
>> reset out of set_sysclk() into the teardown path where it belongs.
>>
>> Signed-off-by: Prasad Kumpatla <prasad.kumpatla@oss.qualcomm.com>
>> ---
>>   sound/soc/codecs/wsa885x.c | 11 ++++++++++-
>>   1 file changed, 10 insertions(+), 1 deletion(-)
>>
>> diff --git a/sound/soc/codecs/wsa885x.c b/sound/soc/codecs/wsa885x.c
>> index 1faa8541a872..5ffbf9e89fd9 100644
>> --- a/sound/soc/codecs/wsa885x.c
>> +++ b/sound/soc/codecs/wsa885x.c
>> @@ -896,7 +896,6 @@ static int wsa885x_codec_set_sysclk(struct 
>> snd_soc_dai *dai, int clk_id,
>>         regmap_write(wsa885x->regmap, WSA885X_DIG_CTRL0_SYS_CLK_SEL, 
>> 0x00);
>>       regmap_write(wsa885x->regmap, WSA885X_DIG_CTRL0_POWER_FSM_CTL1, 
>> 0x01);
>> -    regmap_write(wsa885x->regmap, WSA885X_ANA_TOP_BG_TVP_OVRD_CTL, 
>> 0x00);
>>         return 0;
>>   }
>> @@ -1006,6 +1005,16 @@ static int wsa885x_codec_hw_free(struct 
>> snd_pcm_substream *substream,
>>                    struct snd_soc_dai *dai)
>>   {
>>       static const struct reg_sequence regs[] = {
>> +        { WSA885X_DIG_CTRL1_I2S_RESET_CTL, 0x00 },
>> +        { WSA885X_DIG_CTRL1_I2S_CFG0_TDM_TX, 0x00 },
>> +        { WSA885X_DIG_CTRL1_I2S_CFG1_TDM_TX, 0x00 },
>> +        { WSA885X_DIG_CTRL1_I2S_TDM_CTL1, 0x05 },
>> +        { WSA885X_DIG_CTRL1_I2S_TDM_CTL0, 0x00 },
>> +        { WSA885X_DIG_CTRL1_I2S_TDM_CH_TX, 0x00 },
>> +        { WSA885X_DIG_CTRL1_I2S_CTL0, 0x06 },
>> +        { WSA885X_DIG_CTRL1_I2S_TDM_CH_RX, 0x08 },
>> +        { WSA885X_DIG_CTRL0_CLK_SOURCE_ENABLE, 0x00 },
>> +        { WSA885X_ANA_TOP_BG_TVP_OVRD_CTL, 0x00 },
>
>
> This moves the BG_TVP override clear from immediately after a 
> successful PLL lock to hw_free(), so WSA885X_ANA_TOP_BG_TVP_OVRD_CTL 
> appears to remain at 0x03 for the lifetime of the active stream.
>
> Is that intentional for the back-to-back playback fix? If the override 
> is only needed during PLL programming/lock, keeping the old immediate 
> clear and also resetting it during hw_free() would preserve the 
> existing active-stream behavior while still cleaning up the teardown 
> path.


The override remaining at 0x03 during the active stream is intentional. 
The teardown sequence requires clearing |BG_TVP_OVRD_CTL| only after the 
PLL is disabled and the device has entered PS3. Doing this earlier in 
set_sysclk() violates that sequence and causes the
back-to-back playback issue. Since mute_stream() already transitions the 
device to PS3,hw_free() is the first safe point for this cleanup.

Thanks,
Prasad

>
> Thanks
> Ajay Kumar Nandam
>
>
>>           { WSA885X_DIG_CTRL0_PA_FSM_CTL, 0x00 },
>>       };
>>       struct wsa885x_priv *wsa885x;
>

[PATCH v1 2/3] ASoC: qcom: sc8280xp: add Maili sound card configuration

[Prasad Kumpatla]

Maili ships its own firmware, so its topology file has to live in a
separate maili/ firmware directory. The topology load path is derived
from the sound card driver_name, so reusing the Hawi data would look
up the topology under hawi/ instead.

Add a dedicated maili_priv_data with driver_name "maili" for the
qcom,maili-sndcard compatible so the topology is loaded from the maili/
directory. It keeps the same DAPM widgets and enables codec sysclk,
MI2S BCLK and WCD jack detection for the Maili audio pipeline.

Signed-off-by: Prasad Kumpatla <prasad.kumpatla@oss.qualcomm.com>
---
 sound/soc/qcom/sc8280xp.c | 11 ++++++++++-
 1 file changed, 10 insertions(+), 1 deletion(-)

diff --git a/sound/soc/qcom/sc8280xp.c b/sound/soc/qcom/sc8280xp.c
index b5d367486d56..b97cafeb8e78 100644
--- a/sound/soc/qcom/sc8280xp.c
+++ b/sound/soc/qcom/sc8280xp.c
@@ -552,6 +552,15 @@ static const struct qcom_snd_soc_common kaanapali_priv_data = {
 	.wcd_jack = true,
 };
 
+static const struct qcom_snd_soc_common maili_priv_data = {
+	.driver_name = "maili",
+	.dapm_widgets = sc8280xp_dapm_widgets,
+	.num_dapm_widgets = ARRAY_SIZE(sc8280xp_dapm_widgets),
+	.codec_sysclk_set = true,
+	.mi2s_bclk_enable = true,
+	.wcd_jack = true,
+};
+
 static const struct qcom_snd_soc_common qcs9100_priv_data = {
 	.driver_name = "sa8775p",
 	.dapm_widgets = sc8280xp_dapm_widgets,
@@ -676,7 +685,7 @@ static const struct of_device_id snd_sc8280xp_dt_match[] = {
 	{ .compatible = "qcom,eliza-sndcard", .data = &eliza_priv_data },
 	{ .compatible = "qcom,hawi-sndcard", .data = &hawi_priv_data },
 	{ .compatible = "qcom,kaanapali-sndcard", .data = &kaanapali_priv_data },
-	{ .compatible = "qcom,maili-sndcard", .data = &hawi_priv_data },
+	{ .compatible = "qcom,maili-sndcard", .data = &maili_priv_data },
 	{ .compatible = "qcom,qcm6490-idp-sndcard", .data = &qcm6490_priv_data },
 	{ .compatible = "qcom,qcs615-sndcard", .data = &qcs615_priv_data },
 	{ .compatible = "qcom,qcs6490-rb3gen2-sndcard", .data = &qcs6490_priv_data },
-- 
2.34.1

Re: [PATCH v1 2/3] ASoC: qcom: sc8280xp: add Maili sound card configuration

[Ajay Kumar Nandam]

On 10/6/2026 11:07 AM, Prasad Kumpatla wrote:
> Maili ships its own firmware, so its topology file has to live in a
> separate maili/ firmware directory. The topology load path is derived
> from the sound card driver_name, so reusing the Hawi data would look
> up the topology under hawi/ instead.
> 
> Add a dedicated maili_priv_data with driver_name "maili" for the
> qcom,maili-sndcard compatible so the topology is loaded from the maili/
> directory. It keeps the same DAPM widgets and enables codec sysclk,
> MI2S BCLK and WCD jack detection for the Maili audio pipeline.
> 
> Signed-off-by: Prasad Kumpatla <prasad.kumpatla@oss.qualcomm.com>

LGTM

Reviewed-by: Ajay Kumar Nandam <ajay.nandam@oss.qualcomm.com>

Thanks
Ajay Kumar Nandam

> ---
>   sound/soc/qcom/sc8280xp.c | 11 ++++++++++-
>   1 file changed, 10 insertions(+), 1 deletion(-)
> 
> diff --git a/sound/soc/qcom/sc8280xp.c b/sound/soc/qcom/sc8280xp.c
> index b5d367486d56..b97cafeb8e78 100644
> --- a/sound/soc/qcom/sc8280xp.c
> +++ b/sound/soc/qcom/sc8280xp.c
> @@ -552,6 +552,15 @@ static const struct qcom_snd_soc_common kaanapali_priv_data = {
>   	.wcd_jack = true,
>   };
>   
> +static const struct qcom_snd_soc_common maili_priv_data = {
> +	.driver_name = "maili",
> +	.dapm_widgets = sc8280xp_dapm_widgets,
> +	.num_dapm_widgets = ARRAY_SIZE(sc8280xp_dapm_widgets),
> +	.codec_sysclk_set = true,
> +	.mi2s_bclk_enable = true,
> +	.wcd_jack = true,
> +};
> +
>   static const struct qcom_snd_soc_common qcs9100_priv_data = {
>   	.driver_name = "sa8775p",
>   	.dapm_widgets = sc8280xp_dapm_widgets,
> @@ -676,7 +685,7 @@ static const struct of_device_id snd_sc8280xp_dt_match[] = {
>   	{ .compatible = "qcom,eliza-sndcard", .data = &eliza_priv_data },
>   	{ .compatible = "qcom,hawi-sndcard", .data = &hawi_priv_data },
>   	{ .compatible = "qcom,kaanapali-sndcard", .data = &kaanapali_priv_data },
> -	{ .compatible = "qcom,maili-sndcard", .data = &hawi_priv_data },
> +	{ .compatible = "qcom,maili-sndcard", .data = &maili_priv_data },
>   	{ .compatible = "qcom,qcm6490-idp-sndcard", .data = &qcm6490_priv_data },
>   	{ .compatible = "qcom,qcs615-sndcard", .data = &qcs615_priv_data },
>   	{ .compatible = "qcom,qcs6490-rb3gen2-sndcard", .data = &qcs6490_priv_data },

[PATCH v1 3/3] arm64: defconfig: Enable Hawi LPASS LPI pinctrl driver

[Prasad Kumpatla]

Build the LPASS LPI pinctrl driver as module, as required by the Hawi
and Maili platforms to control all the LPI GPIOs.

Signed-off-by: Prasad Kumpatla <prasad.kumpatla@oss.qualcomm.com>
---
 arch/arm64/configs/defconfig | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig
index fce418fe6ff6..2a8e94b4d09a 100644
--- a/arch/arm64/configs/defconfig
+++ b/arch/arm64/configs/defconfig
@@ -704,6 +704,7 @@ CONFIG_PINCTRL_IMX_SCMI=y
 CONFIG_PINCTRL_IMX91=y
 CONFIG_PINCTRL_QCOM_SPMI_PMIC=y
 CONFIG_PINCTRL_LPASS_LPI=m
+CONFIG_PINCTRL_HAWI_LPASS_LPI=m
 CONFIG_PINCTRL_MILOS_LPASS_LPI=m
 CONFIG_PINCTRL_SC7280_LPASS_LPI=m
 CONFIG_PINCTRL_SM6115_LPASS_LPI=m
-- 
2.34.1

Re: [PATCH v1 3/3] arm64: defconfig: Enable Hawi LPASS LPI pinctrl driver

[Ajay Kumar Nandam]

On 10/6/2026 11:07 AM, Prasad Kumpatla wrote:
> Build the LPASS LPI pinctrl driver as module, as required by the Hawi
> and Maili platforms to control all the LPI GPIOs.
> 
> Signed-off-by: Prasad Kumpatla <prasad.kumpatla@oss.qualcomm.com>

LGTM

Reviewed-by: Ajay Kumar Nandam <ajay.nandam@oss.qualcomm.com>

Thanks
Ajay Kumar Nandam

> ---
>   arch/arm64/configs/defconfig | 1 +
>   1 file changed, 1 insertion(+)
> 
> diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig
> index fce418fe6ff6..2a8e94b4d09a 100644
> --- a/arch/arm64/configs/defconfig
> +++ b/arch/arm64/configs/defconfig
> @@ -704,6 +704,7 @@ CONFIG_PINCTRL_IMX_SCMI=y
>   CONFIG_PINCTRL_IMX91=y
>   CONFIG_PINCTRL_QCOM_SPMI_PMIC=y
>   CONFIG_PINCTRL_LPASS_LPI=m
> +CONFIG_PINCTRL_HAWI_LPASS_LPI=m
>   CONFIG_PINCTRL_MILOS_LPASS_LPI=m
>   CONFIG_PINCTRL_SC7280_LPASS_LPI=m
>   CONFIG_PINCTRL_SM6115_LPASS_LPI=m

Re: [PATCH v1 3/3] arm64: defconfig: Enable Hawi LPASS LPI pinctrl driver

[Krzysztof Kozlowski]

On 06/10/2026 07:37, Prasad Kumpatla wrote:
> Build the LPASS LPI pinctrl driver as module, as required by the Hawi
> and Maili platforms to control all the LPI GPIOs.

You already sent it two weeks ago, so this is not v1.

It wasn't picked up and this won't be either.

Same comments as for every other defconfig patches. Missing proper
description, missing rationale why. Hawi and Maili do not need that.

Best regards,
Krzysztof

Re: [PATCH v1 3/3] arm64: defconfig: Enable Hawi LPASS LPI pinctrl driver

[Prasad Kumpatla]

On 10/7/2026 1:15 PM, Krzysztof Kozlowski wrote:
> On 06/10/2026 07:37, Prasad Kumpatla wrote:
>> Build the LPASS LPI pinctrl driver as module, as required by the Hawi
>> and Maili platforms to control all the LPI GPIOs.
> You already sent it two weeks ago, so this is not v1.


Thanks for the note.
This patch was previously posted as part of the earlier Hawi/Maili 
series. I'll update the versioning in the next revision to reflect its 
posting history correctly.

>
> It wasn't picked up and this won't be either.
>
> Same comments as for every other defconfig patches. Missing proper
> description, missing rationale why. Hawi and Maili do not need that.

Thanks for the feedback.

I understand your concern regarding the defconfig change.
The defconfig change goes along with the Hawi/Maili DT updates in the 
original series, so I'll keep it there and improve the commit 
description and rationale.
Thanks,
Prasad

>
> Best regards,
> Krzysztof