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From: John Garry <john.garry@huawei.com>
To: Arnd Bergmann <arnd@arndb.de>
Cc: "James E.J. Bottomley" <jejb@linux.vnet.ibm.com>,
	"Martin K. Petersen" <martin.petersen@oracle.com>,
	John Garry <john.garry2@mail.dcu.ie>, <linuxarm@huawei.com>,
	<linux-scsi@vger.kernel.org>,
	"Linux Kernel Mailing List" <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH 09/22] scsi: hisi_sas: retrieve SAS address for pci-based controller
Date: Thu, 18 May 2017 10:09:02 +0100	[thread overview]
Message-ID: <10ad7e70-b0c4-8ee6-c5e8-74ee6511f171@huawei.com> (raw)
In-Reply-To: <CAK8P3a0obfJYviU4kZ+KtfbrEpjOaJJazJQbV0_xJ24+YYMD_A@mail.gmail.com>

>> Hi Arnd,
>>
>> Currently there is no pci device listed in the ACPI tables.
>>
>> What I am doing is declaring a fake device in the root of the System bus
>> tree of the ACPI tables, and in the kernel driver finding it by matching the
>> name. It is not the ACPI companion for the pci device.
>>
>> So I think that we can define the pci device under the pci bus in the ACPI
>> tables, and define the ADR and DSD. Then we would have an ACPI companion for
>> the device, and from that get the SAS address.
>
> Yes, that would be much better, and allow us to use the device properties
> interface directly. An additional advantage is that the property definition
> can be exactly the same as for the v1/v2 platform_device properties
> for anything that might be needed across all versions.  sas-addr already
> fits in there, and there might be additional properties you need in the
> future.
>

Hi Arnd,

OK, we'll try this.

As for other properties, phy and queue count are common to all versions.

However, I need to consider more if I should add these - maybe it is ok. 
The reason we did not hardcode these for v1/v2 was that these were 
variable for controllers inter and intra SoC.

hip08 only has 1 controller, and I have been told that each controller 
will have a unique pci device id that for future SoCs, so it's viable to 
hardcode.

>> An alternative to this ACPI device method is for UEFI to write the SAS
>> address to a defined free location in device's pci config space, which the
>> driver can read.
>
> That sounds ok as well, it would be nice to not rely on firmware data here,
> but I'd have to see how the implementation ends up: IIRC you should
> not just put the data at a fixed location in the config space but instead use
> the 'extended capabilities' infrastructure to find the data.
> PCI_EXT_CAP_ID_VNDR might be the right one here, but I don't
> know enough about this, so please consult with someone who does
> (or the PCIe specification).
>

Right, we'll keep ACPI table description as plan A.

>       Arnd
>

Much appreciated,
John

> .
>

  reply	other threads:[~2017-05-18  9:09 UTC|newest]

Thread overview: 35+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-05-17 10:49 [PATCH 00/22] hisi_sas: hip08 support John Garry
2017-05-17 10:49 ` [PATCH 01/22] scsi: hisi_sas: fix timeout check in hisi_sas_internal_task_abort() John Garry
2017-05-17 10:49 ` [PATCH 02/22] scsi: hisi_sas: optimise the usage of hisi_hba.lock John Garry
2017-05-17 10:49 ` [PATCH 03/22] scsi: hisi_sas: relocate get_ata_protocol() John Garry
2017-05-17 10:49 ` [PATCH 04/22] scsi: hisi_sas: relocate sata_done_v2_hw() John Garry
2017-05-17 10:49 ` [PATCH 05/22] scsi: hisi_sas: relocate get_ncq_tag_v2_hw() John Garry
2017-05-17 10:49 ` [PATCH 06/22] scsi: hisi_sas: add pci_dev in hisi_hba struct John Garry
2017-05-17 10:49 ` [PATCH 07/22] scsi: hisi_sas: add the initialisation for pci-based controller John Garry
2017-05-17 12:33   ` Arnd Bergmann
2017-05-17 13:03     ` John Garry
2017-05-17 10:49 ` [PATCH 08/22] scsi: hisi_sas: add bare v3 hw driver John Garry
2017-05-17 10:49 ` [PATCH 09/22] scsi: hisi_sas: retrieve SAS address for pci-based controller John Garry
2017-05-17 12:37   ` Arnd Bergmann
2017-05-17 13:37     ` John Garry
2017-05-17 14:13       ` Arnd Bergmann
2017-05-17 16:45         ` John Garry
2017-05-17 19:23           ` Arnd Bergmann
2017-05-18  9:09             ` John Garry [this message]
2017-05-17 10:49 ` [PATCH 10/22] scsi: hisi_sas: add v3 hw init John Garry
2017-05-17 10:49 ` [PATCH 11/22] scsi: hisi_sas: add v3 hw PHY init John Garry
2017-05-17 10:49 ` [PATCH 12/22] scsi: hisi_sas: add phy up/down/bcast and channel ISR John Garry
2017-05-17 10:49 ` [PATCH 13/22] scsi: hisi_sas: add v3 cq interrupt handler John Garry
2017-05-17 10:49 ` [PATCH 14/22] scsi: hisi_sas: add v3 code to send SSP frame John Garry
2017-05-17 10:49 ` [PATCH 15/22] scsi: hisi_sas: add v3 code to send SMP frame John Garry
2017-05-17 10:49 ` [PATCH 16/22] scsi: hisi_sas: add v3 code to send ATA frame John Garry
2017-05-17 10:49 ` [PATCH 17/22] scsi: hisi_sas: add v3 code for itct setup and free John Garry
2017-05-17 10:49 ` [PATCH 18/22] scsi: hisi_sas: add v3 code to send internal abort command John Garry
2017-05-17 10:49 ` [PATCH 19/22] scsi: hisi_sas: add get_wideport_bitmap_v3_hw() John Garry
2017-05-17 10:49 ` [PATCH 20/22] scsi: hisi_sas: Add v3 code to support ECC and AXI bus fatal error John Garry
2017-05-17 12:27   ` Arnd Bergmann
2017-05-17 12:38     ` John Garry
2017-06-13 14:05       ` John Garry
2017-05-17 10:49 ` [PATCH 21/22] scsi: hisi_sas: add v3 code to fill some more hw function pointers John Garry
2017-05-17 10:49 ` [PATCH 22/22] scsi: hisi_sas: modify internal abort dev flow for v3 hw John Garry
2017-05-17 12:38 ` [PATCH 00/22] hisi_sas: hip08 support Arnd Bergmann

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