From: Christophe KERELLO <christophe.kerello@foss.st.com>
To: <mateusz.nowicki@posteo.net>
Cc: Ulf Hansson <ulfh@kernel.org>, <linux-mmc@vger.kernel.org>,
Russell King <linux@armlinux.org.uk>,
Linus Walleij <linusw@kernel.org>,
Yann Gautier <yann.gautier@foss.st.com>,
Maxime Coquelin <mcoquelin.stm32@gmail.com>,
Alexandre Torgue <alexandre.torgue@foss.st.com>,
<linux-stm32@st-md-mailman.stormreply.com>,
<linux-arm-kernel@lists.infradead.org>,
<linux-kernel@vger.kernel.org>, <stable@vger.kernel.org>
Subject: Re: [PATCH 2/3] mmc: mmci: stm32: do not use NEGEDGE in HS200 mode
Date: Tue, 3 Nov 2026 16:08:33 +0100 [thread overview]
Message-ID: <10bc732a-e36b-4067-ac97-1e8ac15ba1f9@foss.st.com> (raw)
In-Reply-To: <f9358cbe526c22c6a8fcbdde814820e3@posteo.net>
Hello Mateusz,
On 11/3/26 12:40, mateusz.nowicki@posteo.net wrote:
> Hello Christophe,
>
>> No, it is not what it is written in the RM. If clkdiv is equal to 0,
>> NEGEDGE has no effect.
>> NEGEDGE has an effect only when clkdiv > 0, so it can be used with
>> HS200.
>
> You're right, thanks for the correction. I read the NA in table 268 as
> "not allowed in HS200", but it is only there because CLKDIV is 0 in that
> configuration. I'll drop this patch.
>
>> On ST downstream Linux Kernel, you can find following patch not
>> already upstream:
>> mmc: mmci: stm32: use the delay block above 100 MHz on stm32mp25 SoC
>> (Commit ca3b1cf)
>> By applying previous downstream patch + patch 3 of this patchset +
>> using original slew rate that was upstream on
>> this board (slew rate set to 2 for the clock IO, 1 for the others
>> IOs), HS200 should run on a ST MP25 DK board at 100 MHz.
>
> Thanks for the pointer, that was the missing piece. I went back to the
> DK and tested it with the SDMMC2 kernel clock at 200 MHz, so HS200 runs
> at 100 MHz like in mainline. Without ca3b1cf every write test failed,
> no matter whether NEGEDGE was set or which pin group I used. With
> ca3b1cf all runs were clean, with pins_a as well as with pins_b. I also
> checked 150 MHz (no divider, delay block in use), and it works with
> both pin groups too.
>
> So NEGEDGE was never the problem, it was the delay block running at
> 100 MHz. I'll include ca3b1cf and 01d3cac in v2, with you as the author.
Thank you very much for confirming that everything works correctly in
both configurations.
I let you submit these two patches upstream; while the commit titles and
messages can be adjusted,
we simply ask that you retain the original author information as well as
the "Signed-off-by" line
when the patches originate from the ST downstream branch. Thank you in
advance.
>
> One more thing about the pins. I added the pins_b groups (faster slew
> rate) to the DK device tree in 7.4 because pins_a seemed to corrupt data
> in HS200 at 100 MHz. Looking at it now, that was the same delay block
> issue. Would you like me to send a patch that switches the DK back to
> pins_a and drops pins_b?
Yes, using pins_a on the DK board is preferable to using pins_b.
This helps avoid overshoots on the SDMMC clock signal, which would
otherwise occur with faster input/output (I/O) pins.
These overshoots can interfere with other functional blocks, such as the
USB; therefore, it is better to use I/O pins
that provide a "smoother" signal. Since pins_b is not being used, it is
best to remove the pins_b configurations for SDMMC2.
Regards,
Christophe Kerello.
>
>> This patch breaks also MP13 SoC that is supporting HS200.
>
> Understood, sorry about that.
>
> Regards,
> Mateusz
>
next prev parent reply other threads:[~2026-11-03 15:08 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-10-31 12:07 [PATCH 0/3] mmc: mmci: stm32: silent data corruption and HS200 fixes Mateusz Nowicki
2026-10-31 12:07 ` [PATCH 1/3] mmc: mmci: do not count a data CRC error as a complete transfer Mateusz Nowicki
2026-10-31 12:07 ` [PATCH 2/3] mmc: mmci: stm32: do not use NEGEDGE in HS200 mode Mateusz Nowicki
2026-11-02 16:48 ` Christophe KERELLO
2026-11-03 11:40 ` mateusz.nowicki
2026-11-03 15:08 ` Christophe KERELLO [this message]
2026-10-31 12:07 ` [PATCH 3/3] mmc: mmci: stm32: lock the STM32MP25 delay block again before tuning Mateusz Nowicki
2026-11-02 17:13 ` Christophe KERELLO
2026-11-03 11:40 ` mateusz.nowicki
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