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From: "CK Hu (胡俊光)" <ck.hu@mediatek.com>
To: AngeloGioacchino Del Regno
	<angelogioacchino.delregno@collabora.com>,
	"chunkuang.hu@kernel.org" <chunkuang.hu@kernel.org>
Cc: "linux-mediatek@lists.infradead.org"
	<linux-mediatek@lists.infradead.org>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	"devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
	"simona@ffwll.ch" <simona@ffwll.ch>,
	"tzimmermann@suse.de" <tzimmermann@suse.de>,
	"mripard@kernel.org" <mripard@kernel.org>,
	"Jitao Shi (石记涛)" <jitao.shi@mediatek.com>,
	"kernel@collabora.com" <kernel@collabora.com>,
	"p.zabel@pengutronix.de" <p.zabel@pengutronix.de>,
	"maarten.lankhorst@linux.intel.com"
	<maarten.lankhorst@linux.intel.com>,
	"conor+dt@kernel.org" <conor+dt@kernel.org>,
	"robh@kernel.org" <robh@kernel.org>,
	"dri-devel@lists.freedesktop.org"
	<dri-devel@lists.freedesktop.org>,
	"airlied@gmail.com" <airlied@gmail.com>,
	"linux-arm-kernel@lists.infradead.org"
	<linux-arm-kernel@lists.infradead.org>,
	"matthias.bgg@gmail.com" <matthias.bgg@gmail.com>,
	"krzk+dt@kernel.org" <krzk+dt@kernel.org>
Subject: Re: [PATCH v1 3/6] drm/mediatek: mtk_dpi: Use an array for pixclk factor calculation
Date: Fri, 22 Nov 2024 06:23:44 +0000	[thread overview]
Message-ID: <120c65e7c21821a72fa5165e578cc1c39cf0c864.camel@mediatek.com> (raw)
In-Reply-To: <6e07043e70111920848cc3d22e5c60371c0fb65d.camel@mediatek.com>

Hi, Angelo:

On Fri, 2024-11-22 at 11:54 +0800, CK Hu wrote:
> Hi, Angelo:
> 
> On Wed, 2024-11-20 at 13:44 +0100, AngeloGioacchino Del Regno wrote:
> > External email : Please do not click links or open attachments until you have verified the sender or the content.
> > 
> > 
> > Setting the TVD PLL clock requires to multiply the target pixel
> > clock by a specific constant factor to achieve the target PLL
> > frequency, and this is done to reduce jitter to acceptable levels.
> > 
> > On all MediaTek SoCs, the factor is not retrieved by any real kind
> > of calculation but rather by checking if the target pixel clock
> > is less than a specified frequency, hence assigning a function
> > pointer for just a bunch of if branches does enlarge the code
> > size for little reason.
> > 
> > Remove all SoC-specific functions, add a structure `mtk_dpi_factor`
> > that holds a clock frequency and corresponding PLL factor, and
> > declare the constraints for each SoC in form of an array of said
> > structure.
> > Instead of function pointers, this structure (and its size) is then
> > assigned to each SoC's platform data.
> > 
> > The "calculation" is then performed with a new static function
> > mtk_dpi_calculate_factor(dpi, mode_clk) that iterates through all
> > of the entries of the aforementioned array and returns the right
> > factor.
> > 
> > If no factor is found, the lowest possible factor is returned,
> > mimicking the same flow as all of the old per-SoC calculation
> > functions.
> > 
> > This commit brings no functional change.
> 

[snip]

> >  static int mtk_dpi_set_display_mode(struct mtk_dpi *dpi,
> >                                     struct drm_display_mode *mode)
> >  {
> > @@ -529,7 +550,7 @@ static int mtk_dpi_set_display_mode(struct mtk_dpi *dpi,
> >         unsigned int factor;
> > 
> >         /* let pll_rate can fix the valid range of tvdpll (1G~2GHz) */
> > -       factor = dpi->conf->cal_factor(mode->clock);
> > +       factor = mtk_dpi_calculate_factor(dpi, mode_clk);

mode_clk is defined in next patch.
keep mode->clock in this patch to keep my reviewed-by tag.

Regards,
CK

> >         drm_display_mode_to_videomode(mode, &vm);
> >         pll_rate = vm.pixelclock * factor;
> > 
> > @@ -964,48 +985,6 @@ static const struct component_ops mtk_dpi_component_ops = {
> >         .unbind = mtk_dpi_unbind,
> >  };
> > 



  reply	other threads:[~2024-11-22  6:23 UTC|newest]

Thread overview: 24+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-11-20 12:44 [PATCH v1 0/6] drm/mediatek: dpi: Add support for MT8195/8188 and Pattern Generator AngeloGioacchino Del Regno
2024-11-20 12:44 ` [PATCH v1 1/6] dt-bindings: display: mediatek: dpi: Add MT8195 and MT8188 compat AngeloGioacchino Del Regno
2024-11-21  8:39   ` Krzysztof Kozlowski
2024-11-22  2:00   ` CK Hu (胡俊光)
2024-11-20 12:44 ` [PATCH v1 2/6] drm/mediatek: mtk_dpi: Add support for Pattern Generator in debugfs AngeloGioacchino Del Regno
2024-11-22  2:02   ` CK Hu (胡俊光)
2024-11-20 12:44 ` [PATCH v1 3/6] drm/mediatek: mtk_dpi: Use an array for pixclk factor calculation AngeloGioacchino Del Regno
2024-11-22  3:54   ` CK Hu (胡俊光)
2024-11-22  6:23     ` CK Hu (胡俊光) [this message]
2024-11-25 16:55       ` AngeloGioacchino Del Regno
2024-11-20 12:44 ` [PATCH v1 4/6] drm/mediatek: mtk_dpi: Move pixel clock setting flow to function AngeloGioacchino Del Regno
2024-11-20 12:44 ` [PATCH v1 5/6] drm/mediatek: mtk_dpi: Add checks for reg_h_fre_con existence AngeloGioacchino Del Regno
2024-11-26  5:45   ` CK Hu (胡俊光)
2024-11-20 12:44 ` [PATCH v1 6/6] drm/mediatek: Add support for MT8195 Digital Parallel Interface AngeloGioacchino Del Regno
2024-11-22  7:23   ` CK Hu (胡俊光)
2024-11-25 16:55     ` AngeloGioacchino Del Regno
2024-11-26  3:07       ` CK Hu (胡俊光)
2024-11-26  9:25         ` AngeloGioacchino Del Regno
2024-11-27  7:02           ` CK Hu (胡俊光)
2024-11-27  8:41             ` AngeloGioacchino Del Regno
2024-11-27  9:04               ` CK Hu (胡俊光)
2024-11-27 12:44                 ` AngeloGioacchino Del Regno
2024-11-28  3:08                   ` CK Hu (胡俊光)
2024-11-28 10:34                     ` AngeloGioacchino Del Regno

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