x86: add northbridge detection for AMD family 0x11 cpus

x86: add northbridge detection for AMD family 0x11 cpus

[Joerg Roedel]

Hi,

this small patch series adds PCI device ids for the northbridge in AMD family
0x11 processors and adds the ids to the detection code. With this patches the
GART in these processors is found by the kernel.

Regards,

Joerg

git diff --stat tip/master.. :

 arch/x86/kernel/k8.c    |    5 +++--
 include/linux/pci_ids.h |    5 +++++
 2 files changed, 8 insertions(+), 2 deletions(-)

[PATCH 1/2] x86, pci: add northbridge pci ids for fam 0x11 processors

[Joerg Roedel]

The PCI device ids for AMD family 0x11 processors are missing in pci_ids.h.
This patch adds them.

Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
---
 include/linux/pci_ids.h |    5 +++++
 1 files changed, 5 insertions(+), 0 deletions(-)

diff --git a/include/linux/pci_ids.h b/include/linux/pci_ids.h
index cad476d..e15854e 100644
--- a/include/linux/pci_ids.h
+++ b/include/linux/pci_ids.h
@@ -502,6 +502,11 @@
 #define PCI_DEVICE_ID_AMD_10H_NB_DRAM	0x1202
 #define PCI_DEVICE_ID_AMD_10H_NB_MISC	0x1203
 #define PCI_DEVICE_ID_AMD_10H_NB_LINK	0x1204
+#define PCI_DEVICE_ID_AMD_11H_NB_HT	0x1300
+#define PCI_DEVICE_ID_AMD_11H_NB_MAP	0x1301
+#define PCI_DEVICE_ID_AMD_11H_NB_DRAM	0x1302
+#define PCI_DEVICE_ID_AMD_11H_NB_MISC	0x1303
+#define PCI_DEVICE_ID_AMD_11H_NB_LINK	0x1304
 #define PCI_DEVICE_ID_AMD_LANCE		0x2000
 #define PCI_DEVICE_ID_AMD_LANCE_HOME	0x2001
 #define PCI_DEVICE_ID_AMD_SCSI		0x2020
-- 
1.5.3.7

[PATCH 2/2] x86, gart: add detection of AMD family 0x11 northbridges

[Joerg Roedel]

This patch adds the detection of the northbridges in the AMD family 0x11
processors. It also fixes the magic numbers there while changing this code.

Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
---
 arch/x86/kernel/k8.c |    5 +++--
 1 files changed, 3 insertions(+), 2 deletions(-)

diff --git a/arch/x86/kernel/k8.c b/arch/x86/kernel/k8.c
index 7377ccb..304d8ba 100644
--- a/arch/x86/kernel/k8.c
+++ b/arch/x86/kernel/k8.c
@@ -16,8 +16,9 @@ EXPORT_SYMBOL(num_k8_northbridges);
 static u32 *flush_words;
 
 struct pci_device_id k8_nb_ids[] = {
-	{ PCI_DEVICE(PCI_VENDOR_ID_AMD, 0x1103) },
-	{ PCI_DEVICE(PCI_VENDOR_ID_AMD, 0x1203) },
+	{ PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_K8_NB_MISC) },
+	{ PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_10H_NB_MISC) },
+	{ PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_11H_NB_MISC) },
 	{}
 };
 EXPORT_SYMBOL(k8_nb_ids);
-- 
1.5.3.7

Re: x86: add northbridge detection for AMD family 0x11 cpus

[Ingo Molnar]

* Joerg Roedel <joerg.roedel@amd.com> wrote:

> Hi,
> 
> this small patch series adds PCI device ids for the northbridge in AMD family
> 0x11 processors and adds the ids to the detection code. With this patches the
> GART in these processors is found by the kernel.
> 
> Regards,
> 
> Joerg
> 
> git diff --stat tip/master.. :
> 
>  arch/x86/kernel/k8.c    |    5 +++--
>  include/linux/pci_ids.h |    5 +++++
>  2 files changed, 8 insertions(+), 2 deletions(-)

applied to tip/x86/iommu, thanks Joerg.

	Ingo