From: Borislav Petkov <borislav.petkov@amd.com>
To: <mingo@elte.hu>, <hpa@zytor.com>, <tglx@linutronix.de>,
<norsk5@yahoo.com>, <aris@redhat.com>
Cc: <linux-kernel@vger.kernel.org>, <x86@kernel.org>
Subject: [PATCH 10/20] amd64_edac: remove memory and GART TLB error decoders
Date: Tue, 28 Jul 2009 17:06:10 +0200 [thread overview]
Message-ID: <1248793580-29899-11-git-send-email-borislav.petkov@amd.com> (raw)
In-Reply-To: <1248793580-29899-1-git-send-email-borislav.petkov@amd.com>
Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
---
drivers/edac/amd64_edac.c | 36 +++++++-----------------------------
1 files changed, 7 insertions(+), 29 deletions(-)
diff --git a/drivers/edac/amd64_edac.c b/drivers/edac/amd64_edac.c
index 455d143..298020e 100644
--- a/drivers/edac/amd64_edac.c
+++ b/drivers/edac/amd64_edac.c
@@ -2207,28 +2207,6 @@ static int amd64_get_error_info(struct mem_ctl_info *mci,
return 1;
}
-static inline void amd64_decode_gart_tlb_error(struct mem_ctl_info *mci,
- struct err_regs *info)
-{
- u32 ec = ERROR_CODE(info->nbsl);
-
- amd64_mc_printk(mci, KERN_ERR,
- "GART TLB event: transaction type(%s), "
- "cache level(%s)\n", TT_MSG(ec), LL_MSG(ec));
-}
-
-static inline void amd64_decode_mem_cache_error(struct mem_ctl_info *mci,
- struct err_regs *info)
-{
- u32 ec = ERROR_CODE(info->nbsl);
-
- amd64_mc_printk(mci, KERN_ERR,
- "cache hierarchy error: memory transaction type(%s), "
- "transaction type(%s), cache level(%s)\n",
- RRRR_MSG(ec), TT_MSG(ec), LL_MSG(ec));
-}
-
-
/*
* Handle any Correctable Errors (CEs) that have occurred. Check for valid ERROR
* ADDRESS and process.
@@ -2409,19 +2387,19 @@ void amd64_decode_nb_mce(struct mem_ctl_info *mci, struct err_regs *regs,
if (!report_gart_errors)
return;
- pr_emerg("GART TLB error\n");
- amd64_decode_gart_tlb_error(mci, regs);
+ pr_emerg(" GART TLB error, Transaction: %s, Cache Level %s\n",
+ TT_MSG(ec), LL_MSG(ec));
} else if (MEM_ERROR(ec)) {
- pr_emerg("Memory/Cache error\n");
- amd64_decode_mem_cache_error(mci, regs);
+ pr_emerg(" Memory/Cache error, Transaction: %s, Type: %s,"
+ " Cache Level: %s",
+ RRRR_MSG(ec), TT_MSG(ec), LL_MSG(ec));
} else if (BUS_ERROR(ec)) {
- pr_emerg("Bus (Link/DRAM) error\n");
+ pr_emerg(" Bus (Link/DRAM) error\n");
amd64_decode_bus_error(mci, regs);
} else {
/* shouldn't reach here! */
amd64_mc_printk(mci, KERN_WARNING,
- "%s(): unknown MCE error 0x%x\n", __func__,
- ec);
+ "%s(): unknown MCE error 0x%x\n", __func__, ec);
}
pr_emerg("%s.\n", EXT_ERR_MSG(xec));
--
1.6.3.3
next prev parent reply other threads:[~2009-07-28 15:06 UTC|newest]
Thread overview: 21+ messages / expand[flat|nested] mbox.gz Atom feed top
2009-07-28 15:06 [RFC PATCH 0/20 v2] marry mcheck to EDAC Borislav Petkov
2009-07-28 15:06 ` [PATCH 01/20] topology: introduce cpu_node information for multi-node processors Borislav Petkov
2009-07-28 15:06 ` [PATCH 02/20] x86: provide CPU topology " Borislav Petkov
2009-07-28 15:06 ` [PATCH 03/20] x86: add cpu_node topology detection for AMD Magny-Cours Borislav Petkov
2009-07-28 15:06 ` [PATCH 04/20] x86: cacheinfo: fixup L3 cache information " Borislav Petkov
2009-07-28 15:06 ` [PATCH 05/20] x86: mcheck: make use of cpu_node_mask instead of cpu_core_mask to support multi-node processors Borislav Petkov
2009-07-28 15:06 ` [PATCH 06/20] EDAC: move MCE error descriptions to EDAC core Borislav Petkov
2009-07-28 15:06 ` [PATCH 07/20] EDAC: beef up ErrorCodeExt error signatures Borislav Petkov
2009-07-28 15:06 ` [PATCH 08/20] amd64_edac: cleanup amd64_process_error_info Borislav Petkov
2009-07-28 15:06 ` [PATCH 09/20] amd64_edac: cleanup/complete NB MCE decoding Borislav Petkov
2009-07-28 15:06 ` Borislav Petkov [this message]
2009-07-28 15:06 ` [PATCH 11/20] amd64_edac: cleanup amd64_decode_bus_error Borislav Petkov
2009-07-28 15:06 ` [PATCH 12/20] x86, mce: pass mce info to EDAC for decoding Borislav Petkov
2009-07-28 15:06 ` [PATCH 13/20] EDAC, AMD: carve out MCi_STATUS decoding Borislav Petkov
2009-07-28 15:06 ` [PATCH 14/20] EDAC, AMD: carve out decoding of MCi_STATUS ErrorCode Borislav Petkov
2009-07-28 15:06 ` [PATCH 15/20] EDAC, AMD: decode data cache MCEs Borislav Petkov
2009-07-28 15:06 ` [PATCH 16/20] EDAC, AMD: decode instruction " Borislav Petkov
2009-07-28 15:06 ` [PATCH 17/20] EDAC, AMD: decode bus unit MCEs Borislav Petkov
2009-07-28 15:06 ` [PATCH 18/20] EDAC, AMD: decode load store MCEs Borislav Petkov
2009-07-28 15:06 ` [PATCH 19/20] EDAC, AMD: decode FR MCEs Borislav Petkov
2009-07-28 15:06 ` [PATCH 20/20] x86, mce: do not compile mcelog message on AMD Borislav Petkov
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