[PATCH 19/20] EDAC, AMD: decode FR MCEs

[Borislav Petkov <borislav.petkov@amd.com>]

See Fam10h BKDG (31116, rev. 3.28), Table 101.

Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
---
 drivers/edac/edac_mce_amd.c |   13 +++++++++++++
 1 files changed, 13 insertions(+), 0 deletions(-)

diff --git a/drivers/edac/edac_mce_amd.c b/drivers/edac/edac_mce_amd.c
index 1c4468f..a78d16c 100644
--- a/drivers/edac/edac_mce_amd.c
+++ b/drivers/edac/edac_mce_amd.c
@@ -311,6 +311,15 @@ void amd_decode_nb_mce(int node_id, struct err_regs *regs, int handle_errors)
 }
 EXPORT_SYMBOL_GPL(amd_decode_nb_mce);
 
+static void amd_decode_fr_mce(u64 mc5_status)
+{
+	/* we have only one error signature so match all fields at once. */
+	if ((mc5_status & 0xffff) == 0x0f0f)
+		pr_emerg(" FR Error: CPU Watchdog timer expire.\n");
+	else
+		pr_warning("Corrupted FR MCE info?\n");
+}
+
 static inline void amd_decode_err_code(unsigned int ec)
 {
 	if (TLB_ERROR(ec)) {
@@ -391,6 +400,10 @@ void decode_mce(struct mce *m)
 		amd_decode_nb_mce(node, &regs, 1);
 		break;
 
+	case 5:
+		amd_decode_fr_mce(m->status);
+		break;
+
 	default:
 		break;
 	}
-- 
1.6.3.3