Re: [PATCH] PCI: Always set prefetchable base/limit upper32 registers

[Alex Williamson <alex.williamson@hp.com>]

On Mon, 2009-11-30 at 16:00 -0800, Yinghai Lu wrote:
> Alex Williamson wrote:
>  
> > Ah, I think I see where you're going.  We only set IORESOURCE_MEM_64 if
> > base <= limit, ie. the BIOS has programmed the prefetchable range.  This
> > is not a requirement by the PCI spec.  In my case the BIOS has left base
> >> limit, just as Linux would do if it disabled the range, so we never
> > set this flag.
> > 
> >> setup-bus.c::pci_bridge_check_ranges()
> > 
> > This is only checking that the upper 32bits is actually implemented,
> > should we have already set the IORESOURCE_MEM_64 from the function
> > above, which we haven't.  
> > 
> > So, in my case I have a 64bit capable prefetchable range, that the BIOS
> > has not programmed and is not required to program.  We assign it to a
> > 32bit window, and never touch the UPPER32 registers.
> 
> no.
> 
> before assign range to that resource.
> pci_bridge_check_ranges is called, it will check those two bit to make sure that is set correcly
> 
>         if (pmem) {
>                 b_res[2].flags |= IORESOURCE_MEM | IORESOURCE_PREFETCH;
>                 if ((pmem & PCI_PREF_RANGE_TYPE_MASK) == PCI_PREF_RANGE_TYPE_64)
>                         b_res[2].flags |= IORESOURCE_MEM_64;
>         }

Ok, sorry I missed this.  Yes, this is getting called, but when we get
back to pci_setup_bridge() that flag is missing IORESOURCE_MEM_64.
Perhaps these are different resources?  I'm still tracing the code to
find out what happened to that flag.

Also, I'm running 64bit(x86_64), and if lspci is wrong, then so is
setpci.  I don't think there's an "ignore upper32" anywhere, so the
result of 0xffffffffabc00000 - 0x00000000abc00000 is that base > limit
thus the range is disabled at the bridge and the ROM resource we
assigned into the window behind the bridge is inaccessible.

Alex