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From: Paolo Bonzini <pbonzini@redhat.com>
To: David Matlack <dmatlack@google.com>
Cc: "kvm list" <kvm@vger.kernel.org>,
	linux-kernel@vger.kernel.org, "Jim Mattson" <jmattson@google.com>,
	"Radim Krčmář" <rkrcmar@redhat.com>
Subject: Re: [PATCH v3 1/5] KVM: nVMX: generate non-true VMX MSRs based on true versions
Date: Wed, 30 Nov 2016 15:45:55 -0500 (EST)	[thread overview]
Message-ID: <1271508271.857704.1480538755857.JavaMail.zimbra@redhat.com> (raw)
In-Reply-To: <CALzav=eTPVECBfPpkOaUMUbN5KjJuZUixdNB9uqRz+oOi+1-qQ@mail.gmail.com>



----- Original Message -----
> From: "David Matlack" <dmatlack@google.com>
> To: "Paolo Bonzini" <pbonzini@redhat.com>
> Cc: "kvm list" <kvm@vger.kernel.org>, linux-kernel@vger.kernel.org, "Jim Mattson" <jmattson@google.com>, "Radim
> Krčmář" <rkrcmar@redhat.com>
> Sent: Wednesday, November 30, 2016 7:05:04 PM
> Subject: Re: [PATCH v3 1/5] KVM: nVMX: generate non-true VMX MSRs based on true versions
> 
> On Wed, Nov 30, 2016 at 3:16 AM, Paolo Bonzini <pbonzini@redhat.com> wrote:
> > On 30/11/2016 03:14, David Matlack wrote:
> >>
> >>       /* secondary cpu-based controls */
> >> @@ -2868,36 +2865,32 @@ static int vmx_get_vmx_msr(struct kvm_vcpu *vcpu,
> >> u32 msr_index, u64 *pdata)
> >>               *pdata = vmx_control_msr(
> >>                       vmx->nested.nested_vmx_pinbased_ctls_low,
> >>                       vmx->nested.nested_vmx_pinbased_ctls_high);
> >> +             if (msr_index == MSR_IA32_VMX_PINBASED_CTLS)
> >> +                     *pdata |= PIN_BASED_ALWAYSON_WITHOUT_TRUE_MSR;
> >
> > Almost: PIN_BASED_ALWAYSON_WITHOUT_TRUE_MSR must be
> > added to both the low and high parts.  Likewise below.
> > I guess you can use vmx_control_msr to generate it, too.
> 
> SGTM.
> 
> Although that would mean the true MSRs indicate a bit must-be-0 while
> the non-true MSRs are indicating it must-be-1, which seems odd.

You're right. the high part is "can be 1", so the true MSR's high part
must already include the always-on-without-true-MSR bits.  Good!

Paolo

  reply	other threads:[~2016-11-30 20:46 UTC|newest]

Thread overview: 15+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-11-30  2:14 [PATCH v3 0/5] VMX Capability MSRs David Matlack
2016-11-30  2:14 ` [PATCH v3 1/5] KVM: nVMX: generate non-true VMX MSRs based on true versions David Matlack
2016-11-30 11:16   ` Paolo Bonzini
2016-11-30 18:05     ` David Matlack
2016-11-30 20:45       ` Paolo Bonzini [this message]
2016-11-30  2:14 ` [PATCH v3 2/5] KVM: nVMX: support restore of VMX capability MSRs David Matlack
2016-11-30  2:14 ` [PATCH v3 3/5] KVM: nVMX: fix checks on CR{0,4} during virtual VMX operation David Matlack
2016-11-30 21:52   ` Radim Krčmář
2016-11-30 22:33     ` Paolo Bonzini
2016-11-30 23:53       ` David Matlack
2016-12-01 13:21         ` Radim Krčmář
2016-11-30  2:14 ` [PATCH v3 4/5] KVM: nVMX: generate MSR_IA32_CR{0,4}_FIXED1 from guest CPUID David Matlack
2016-11-30  2:14 ` [PATCH v3 5/5] KVM: nVMX: load GUEST_EFER after GUEST_CR0 during emulated VM-entry David Matlack
2016-11-30 11:22 ` [PATCH v3 0/5] VMX Capability MSRs Paolo Bonzini
2016-11-30 18:05   ` David Matlack

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