From: Joerg Roedel <joerg.roedel@amd.com>
To: <iommu@lists.linux-foundation.org>
Cc: <linux-kernel@vger.kernel.org>, Joerg Roedel <joerg.roedel@amd.com>
Subject: [PATCH 01/22] iommu/amd: Convert dev_table_entry to u64
Date: Mon, 5 Dec 2011 14:34:16 +0100 [thread overview]
Message-ID: <1323092077-25501-2-git-send-email-joerg.roedel@amd.com> (raw)
In-Reply-To: <1323092077-25501-1-git-send-email-joerg.roedel@amd.com>
Convert the contents of 'struct dev_table_entry' to u64 to
allow updating the DTE wit 64bit writes as required by the
spec.
Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
---
drivers/iommu/amd_iommu.c | 18 ++++++++++--------
drivers/iommu/amd_iommu_init.c | 12 ++++++------
drivers/iommu/amd_iommu_types.h | 4 ++--
3 files changed, 18 insertions(+), 16 deletions(-)
diff --git a/drivers/iommu/amd_iommu.c b/drivers/iommu/amd_iommu.c
index 4ee277a..661e2bb 100644
--- a/drivers/iommu/amd_iommu.c
+++ b/drivers/iommu/amd_iommu.c
@@ -365,8 +365,8 @@ static void dump_dte_entry(u16 devid)
{
int i;
- for (i = 0; i < 8; ++i)
- pr_err("AMD-Vi: DTE[%d]: %08x\n", i,
+ for (i = 0; i < 4; ++i)
+ pr_err("AMD-Vi: DTE[%d]: %016llx\n", i,
amd_iommu_dev_table[devid].data[i]);
}
@@ -1583,19 +1583,22 @@ static bool dma_ops_domain(struct protection_domain *domain)
static void set_dte_entry(u16 devid, struct protection_domain *domain, bool ats)
{
u64 pte_root = virt_to_phys(domain->pt_root);
- u32 flags = 0;
+ u64 flags = 0;
pte_root |= (domain->mode & DEV_ENTRY_MODE_MASK)
<< DEV_ENTRY_MODE_SHIFT;
pte_root |= IOMMU_PTE_IR | IOMMU_PTE_IW | IOMMU_PTE_P | IOMMU_PTE_TV;
+ flags = amd_iommu_dev_table[devid].data[1];
+
if (ats)
flags |= DTE_FLAG_IOTLB;
- amd_iommu_dev_table[devid].data[3] |= flags;
- amd_iommu_dev_table[devid].data[2] = domain->id;
- amd_iommu_dev_table[devid].data[1] = upper_32_bits(pte_root);
- amd_iommu_dev_table[devid].data[0] = lower_32_bits(pte_root);
+ flags &= ~(0xffffUL);
+ flags |= domain->id;
+
+ amd_iommu_dev_table[devid].data[1] = flags;
+ amd_iommu_dev_table[devid].data[0] = pte_root;
}
static void clear_dte_entry(u16 devid)
@@ -1603,7 +1606,6 @@ static void clear_dte_entry(u16 devid)
/* remove entry from the device table seen by the hardware */
amd_iommu_dev_table[devid].data[0] = IOMMU_PTE_P | IOMMU_PTE_TV;
amd_iommu_dev_table[devid].data[1] = 0;
- amd_iommu_dev_table[devid].data[2] = 0;
amd_iommu_apply_erratum_63(devid);
}
diff --git a/drivers/iommu/amd_iommu_init.c b/drivers/iommu/amd_iommu_init.c
index 82d2410..17e0f77 100644
--- a/drivers/iommu/amd_iommu_init.c
+++ b/drivers/iommu/amd_iommu_init.c
@@ -584,18 +584,18 @@ static void __init free_event_buffer(struct amd_iommu *iommu)
/* sets a specific bit in the device table entry. */
static void set_dev_entry_bit(u16 devid, u8 bit)
{
- int i = (bit >> 5) & 0x07;
- int _bit = bit & 0x1f;
+ int i = (bit >> 6) & 0x03;
+ int _bit = bit & 0x3f;
- amd_iommu_dev_table[devid].data[i] |= (1 << _bit);
+ amd_iommu_dev_table[devid].data[i] |= (1UL << _bit);
}
static int get_dev_entry_bit(u16 devid, u8 bit)
{
- int i = (bit >> 5) & 0x07;
- int _bit = bit & 0x1f;
+ int i = (bit >> 6) & 0x03;
+ int _bit = bit & 0x3f;
- return (amd_iommu_dev_table[devid].data[i] & (1 << _bit)) >> _bit;
+ return (amd_iommu_dev_table[devid].data[i] & (1UL << _bit)) >> _bit;
}
diff --git a/drivers/iommu/amd_iommu_types.h b/drivers/iommu/amd_iommu_types.h
index 5b9c507..f8dd9ae 100644
--- a/drivers/iommu/amd_iommu_types.h
+++ b/drivers/iommu/amd_iommu_types.h
@@ -230,7 +230,7 @@
#define IOMMU_PTE_IR (1ULL << 61)
#define IOMMU_PTE_IW (1ULL << 62)
-#define DTE_FLAG_IOTLB 0x01
+#define DTE_FLAG_IOTLB (0x01UL << 32)
#define IOMMU_PAGE_MASK (((1ULL << 52) - 1) & ~0xfffULL)
#define IOMMU_PTE_PRESENT(pte) ((pte) & IOMMU_PTE_P)
@@ -484,7 +484,7 @@ extern struct list_head amd_iommu_pd_list;
* Structure defining one entry in the device table
*/
struct dev_table_entry {
- u32 data[8];
+ u64 data[4];
};
/*
--
1.7.5.4
next prev parent reply other threads:[~2011-12-05 13:36 UTC|newest]
Thread overview: 28+ messages / expand[flat|nested] mbox.gz Atom feed top
2011-12-05 13:34 [PATCH 0/22] Initial AMD IOMMUv2 support Joerg Roedel
2011-12-05 13:34 ` Joerg Roedel [this message]
2011-12-05 13:34 ` [PATCH 02/22] iommu/amd: Fix wrong address masks in tlb flush code Joerg Roedel
2011-12-05 13:34 ` [PATCH 03/22] iommu/amd: Get the maximum number of PASIDs supported Joerg Roedel
2011-12-05 13:34 ` [PATCH 04/22] iommu/amd: Setup PPR log when supported by IOMMU Joerg Roedel
2011-12-05 13:34 ` [PATCH 05/22] iommu/amd: Enable GT mode " Joerg Roedel
2011-12-05 13:34 ` [PATCH 06/22] iommu/amd: Add iommuv2 flag to struct amd_iommu Joerg Roedel
2011-12-05 13:34 ` [PATCH 07/22] iommu/amd: Put IOMMUv2 capable devices in pt_domain Joerg Roedel
2011-12-05 13:34 ` [PATCH 08/22] iommu/amd: Implement notifier for PPR faults Joerg Roedel
2011-12-05 13:34 ` [PATCH 09/22] iommu/amd: Add amd_iommu_domain_direct_map function Joerg Roedel
2011-12-05 13:34 ` [PATCH 10/22] iommu/amd: Add support for IOMMUv2 domain mode Joerg Roedel
2011-12-05 13:34 ` [PATCH 11/22] iommu/amd: Implement IOMMUv2 TLB flushing routines Joerg Roedel
2011-12-05 13:34 ` [PATCH 12/22] iommu/amd: Implement functions to manage GCR3 table Joerg Roedel
2011-12-05 13:34 ` [PATCH 13/22] iommu/amd: Implement function to send PPR completions Joerg Roedel
2011-12-05 13:34 ` [PATCH 14/22] iommu/amd: Add function to get IOMMUv2 domain for pdev Joerg Roedel
2011-12-05 13:34 ` [PATCH 15/22] iommu/amd: Add device errata handling Joerg Roedel
2011-12-05 13:34 ` [PATCH 16/22] iommu/amd: Add stat counter for IOMMUv2 events Joerg Roedel
2011-12-05 13:34 ` [PATCH 17/22] iommu/amd: Add driver stub for AMD IOMMUv2 support Joerg Roedel
2011-12-05 13:34 ` [PATCH 18/22] iommu/amd: Implement device aquisition code for IOMMUv2 Joerg Roedel
2011-12-05 13:34 ` [PATCH 19/22] iommu/amd: Add routines to bind/unbind a pasid Joerg Roedel
2011-12-05 13:34 ` [PATCH 20/22] iommu/amd: Implement IO page-fault handler Joerg Roedel
2011-12-14 16:13 ` Jerome Glisse
2011-12-14 16:17 ` Joerg Roedel
2011-12-05 13:34 ` [PATCH 21/22] iommu/amd: Implement notifiers for IOMMUv2 Joerg Roedel
2011-12-05 13:34 ` [PATCH 22/22] iommu/amd: Add invalid_ppr callback Joerg Roedel
2011-12-08 20:47 ` [PATCH 0/22] Initial AMD IOMMUv2 support Jerome Glisse
2011-12-09 14:43 ` Joerg Roedel
2011-12-14 14:26 ` Joerg Roedel
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