From: Joerg Roedel <joerg.roedel@amd.com>
To: <iommu@lists.linux-foundation.org>
Cc: <linux-kernel@vger.kernel.org>, Joerg Roedel <joerg.roedel@amd.com>
Subject: [PATCH 19/22] iommu/amd: Add routines to bind/unbind a pasid
Date: Mon, 5 Dec 2011 14:34:34 +0100 [thread overview]
Message-ID: <1323092077-25501-20-git-send-email-joerg.roedel@amd.com> (raw)
In-Reply-To: <1323092077-25501-1-git-send-email-joerg.roedel@amd.com>
This patch adds routines to bind a specific process
address-space to a given PASID.
Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
---
drivers/iommu/amd_iommu_v2.c | 301 ++++++++++++++++++++++++++++++++++++++++++
include/linux/amd-iommu.h | 26 ++++
2 files changed, 327 insertions(+), 0 deletions(-)
diff --git a/drivers/iommu/amd_iommu_v2.c b/drivers/iommu/amd_iommu_v2.c
index e0ec952..f54b991 100644
--- a/drivers/iommu/amd_iommu_v2.c
+++ b/drivers/iommu/amd_iommu_v2.c
@@ -19,6 +19,7 @@
#include <linux/amd-iommu.h>
#include <linux/mm_types.h>
#include <linux/module.h>
+#include <linux/sched.h>
#include <linux/iommu.h>
#include <linux/pci.h>
#include <linux/gfp.h>
@@ -63,6 +64,9 @@ static spinlock_t state_lock;
static LIST_HEAD(pasid_state_list);
static DEFINE_SPINLOCK(ps_lock);
+static void free_pasid_states(struct device_state *dev_state);
+static void unbind_pasid(struct device_state *dev_state, int pasid);
+
static u16 device_id(struct pci_dev *pdev)
{
u16 devid;
@@ -89,8 +93,16 @@ static struct device_state *get_device_state(u16 devid)
static void free_device_state(struct device_state *dev_state)
{
+ /*
+ * First detach device from domain - No more PRI requests will arrive
+ * from that device after it is unbound from the IOMMUv2 domain.
+ */
iommu_detach_device(dev_state->domain, &dev_state->pdev->dev);
+
+ /* Everything is down now, free the IOMMUv2 domain */
iommu_domain_free(dev_state->domain);
+
+ /* Finally get rid of the device-state */
kfree(dev_state);
}
@@ -100,6 +112,292 @@ static void put_device_state(struct device_state *dev_state)
free_device_state(dev_state);
}
+static void link_pasid_state(struct pasid_state *pasid_state)
+{
+ spin_lock(&ps_lock);
+ list_add_tail(&pasid_state->list, &pasid_state_list);
+ spin_unlock(&ps_lock);
+}
+
+static void __unlink_pasid_state(struct pasid_state *pasid_state)
+{
+ list_del(&pasid_state->list);
+}
+
+static void unlink_pasid_state(struct pasid_state *pasid_state)
+{
+ spin_lock(&ps_lock);
+ __unlink_pasid_state(pasid_state);
+ spin_unlock(&ps_lock);
+}
+
+/* Must be called under dev_state->lock */
+static struct pasid_state **__get_pasid_state_ptr(struct device_state *dev_state,
+ int pasid, bool alloc)
+{
+ struct pasid_state **root, **ptr;
+ int level, index;
+
+ level = dev_state->pasid_levels;
+ root = dev_state->states;
+
+ while (true) {
+
+ index = (pasid >> (9 * level)) & 0x1ff;
+ ptr = &root[index];
+
+ if (level == 0)
+ break;
+
+ if (*ptr == NULL) {
+ if (!alloc)
+ return NULL;
+
+ *ptr = (void *)get_zeroed_page(GFP_ATOMIC);
+ if (*ptr == NULL)
+ return NULL;
+ }
+
+ root = (struct pasid_state **)*ptr;
+ level -= 1;
+ }
+
+ return ptr;
+}
+
+static int set_pasid_state(struct device_state *dev_state,
+ struct pasid_state *pasid_state,
+ int pasid)
+{
+ struct pasid_state **ptr;
+ unsigned long flags;
+ int ret;
+
+ spin_lock_irqsave(&dev_state->lock, flags);
+ ptr = __get_pasid_state_ptr(dev_state, pasid, true);
+
+ ret = -ENOMEM;
+ if (ptr == NULL)
+ goto out_unlock;
+
+ ret = -ENOMEM;
+ if (*ptr != NULL)
+ goto out_unlock;
+
+ *ptr = pasid_state;
+
+ ret = 0;
+
+out_unlock:
+ spin_unlock_irqrestore(&dev_state->lock, flags);
+
+ return ret;
+}
+
+static void clear_pasid_state(struct device_state *dev_state, int pasid)
+{
+ struct pasid_state **ptr;
+ unsigned long flags;
+
+ spin_lock_irqsave(&dev_state->lock, flags);
+ ptr = __get_pasid_state_ptr(dev_state, pasid, true);
+
+ if (ptr == NULL)
+ goto out_unlock;
+
+ *ptr = NULL;
+
+out_unlock:
+ spin_unlock_irqrestore(&dev_state->lock, flags);
+}
+
+static struct pasid_state *get_pasid_state(struct device_state *dev_state,
+ int pasid)
+{
+ struct pasid_state **ptr, *ret = NULL;
+ unsigned long flags;
+
+ spin_lock_irqsave(&dev_state->lock, flags);
+ ptr = __get_pasid_state_ptr(dev_state, pasid, false);
+
+ if (ptr == NULL)
+ goto out_unlock;
+
+ ret = *ptr;
+ if (ret)
+ atomic_inc(&ret->count);
+
+out_unlock:
+ spin_unlock_irqrestore(&dev_state->lock, flags);
+
+ return ret;
+}
+
+static void free_pasid_state(struct pasid_state *pasid_state)
+{
+ kfree(pasid_state);
+}
+
+static void put_pasid_state(struct pasid_state *pasid_state)
+{
+ if (atomic_dec_and_test(&pasid_state->count)) {
+ put_device_state(pasid_state->device_state);
+ free_pasid_state(pasid_state);
+ }
+}
+
+static void unbind_pasid(struct device_state *dev_state, int pasid)
+{
+ struct pasid_state *pasid_state;
+
+ pasid_state = get_pasid_state(dev_state, pasid);
+ if (pasid_state == NULL)
+ return;
+
+ unlink_pasid_state(pasid_state);
+
+ amd_iommu_domain_clear_gcr3(dev_state->domain, pasid);
+ clear_pasid_state(dev_state, pasid);
+
+ put_pasid_state(pasid_state); /* Reference taken in this function */
+ put_pasid_state(pasid_state); /* Reference taken in bind() function */
+}
+
+static void free_pasid_states_level1(struct pasid_state **tbl)
+{
+ int i;
+
+ for (i = 0; i < 512; ++i) {
+ if (tbl[i] == NULL)
+ continue;
+
+ free_page((unsigned long)tbl[i]);
+ }
+}
+
+static void free_pasid_states_level2(struct pasid_state **tbl)
+{
+ struct pasid_state **ptr;
+ int i;
+
+ for (i = 0; i < 512; ++i) {
+ if (tbl[i] == NULL)
+ continue;
+
+ ptr = (struct pasid_state **)tbl[i];
+ free_pasid_states_level1(ptr);
+ }
+}
+
+static void free_pasid_states(struct device_state *dev_state)
+{
+ struct pasid_state *pasid_state;
+ int i;
+
+ for (i = 0; i < dev_state->max_pasids; ++i) {
+ pasid_state = get_pasid_state(dev_state, i);
+ if (pasid_state == NULL)
+ continue;
+
+ unbind_pasid(dev_state, i);
+ put_pasid_state(pasid_state);
+ }
+
+ if (dev_state->pasid_levels == 2)
+ free_pasid_states_level2(dev_state->states);
+ else if (dev_state->pasid_levels == 1)
+ free_pasid_states_level1(dev_state->states);
+ else if (dev_state->pasid_levels != 0)
+ BUG();
+
+ free_page((unsigned long)dev_state->states);
+}
+
+int amd_iommu_bind_pasid(struct pci_dev *pdev, int pasid,
+ struct task_struct *task)
+{
+ struct pasid_state *pasid_state;
+ struct device_state *dev_state;
+ u16 devid;
+ int ret;
+
+ might_sleep();
+
+ if (!amd_iommu_v2_supported())
+ return -ENODEV;
+
+ devid = device_id(pdev);
+ dev_state = get_device_state(devid);
+
+ if (dev_state == NULL)
+ return -EINVAL;
+
+ ret = -EINVAL;
+ if (pasid < 0 || pasid >= dev_state->max_pasids)
+ goto out;
+
+ ret = -ENOMEM;
+ pasid_state = kzalloc(sizeof(*pasid_state), GFP_KERNEL);
+ if (pasid_state == NULL)
+ goto out;
+
+ atomic_set(&pasid_state->count, 1);
+ pasid_state->task = task;
+ pasid_state->mm = task->mm;
+ pasid_state->device_state = dev_state;
+ pasid_state->pasid = pasid;
+
+ ret = set_pasid_state(dev_state, pasid_state, pasid);
+ if (ret)
+ goto out_free;
+
+ ret = amd_iommu_domain_set_gcr3(dev_state->domain, pasid,
+ __pa(pasid_state->mm->pgd));
+ if (ret)
+ goto out_clear_state;
+
+ link_pasid_state(pasid_state);
+
+ return 0;
+
+out_clear_state:
+ clear_pasid_state(dev_state, pasid);
+
+out_free:
+ put_pasid_state(pasid_state);
+
+out:
+ put_device_state(dev_state);
+
+ return ret;
+}
+EXPORT_SYMBOL(amd_iommu_bind_pasid);
+
+void amd_iommu_unbind_pasid(struct pci_dev *pdev, int pasid)
+{
+ struct device_state *dev_state;
+ u16 devid;
+
+ might_sleep();
+
+ if (!amd_iommu_v2_supported())
+ return;
+
+ devid = device_id(pdev);
+ dev_state = get_device_state(devid);
+ if (dev_state == NULL)
+ return;
+
+ if (pasid < 0 || pasid >= dev_state->max_pasids)
+ goto out;
+
+ unbind_pasid(dev_state, pasid);
+
+out:
+ put_device_state(dev_state);
+}
+EXPORT_SYMBOL(amd_iommu_unbind_pasid);
+
int amd_iommu_init_device(struct pci_dev *pdev, int pasids)
{
struct device_state *dev_state;
@@ -202,6 +500,9 @@ void amd_iommu_free_device(struct pci_dev *pdev)
spin_unlock_irqrestore(&state_lock, flags);
+ /* Get rid of any remaining pasid states */
+ free_pasid_states(dev_state);
+
put_device_state(dev_state);
}
EXPORT_SYMBOL(amd_iommu_free_device);
diff --git a/include/linux/amd-iommu.h b/include/linux/amd-iommu.h
index e8c7a2e..23e21e1 100644
--- a/include/linux/amd-iommu.h
+++ b/include/linux/amd-iommu.h
@@ -24,9 +24,13 @@
#ifdef CONFIG_AMD_IOMMU
+struct task_struct;
struct pci_dev;
extern int amd_iommu_detect(void);
+extern int amd_iommu_bind_pasid(struct pci_dev *pdev, int pasid,
+ struct task_struct *task);
+extern void amd_iommu_unbind_pasid(struct pci_dev *pdev, int pasid);
/**
@@ -65,6 +69,28 @@ extern int amd_iommu_init_device(struct pci_dev *pdev, int pasids);
*/
extern void amd_iommu_free_device(struct pci_dev *pdev);
+/**
+ * amd_iommu_bind_pasid() - Bind a given task to a PASID on a device
+ * @pdev: The PCI device to bind the task to
+ * @pasid: The PASID on the device the task should be bound to
+ * @task: the task to bind
+ *
+ * The function returns 0 on success or a negative value on error.
+ */
+extern int amd_iommu_bind_pasid(struct pci_dev *pdev, int pasid,
+ struct task_struct *task);
+
+/**
+ * amd_iommu_unbind_pasid() - Unbind a PASID from its task on
+ * a device
+ * @pdev: The device of the PASID
+ * @pasid: The PASID to unbind
+ *
+ * When this function returns the device is no longer using the PASID
+ * and the PASID is no longer bound to its task.
+ */
+extern void amd_iommu_unbind_pasid(struct pci_dev *pdev, int pasid);
+
#else
static inline int amd_iommu_detect(void) { return -ENODEV; }
--
1.7.5.4
next prev parent reply other threads:[~2011-12-05 13:37 UTC|newest]
Thread overview: 28+ messages / expand[flat|nested] mbox.gz Atom feed top
2011-12-05 13:34 [PATCH 0/22] Initial AMD IOMMUv2 support Joerg Roedel
2011-12-05 13:34 ` [PATCH 01/22] iommu/amd: Convert dev_table_entry to u64 Joerg Roedel
2011-12-05 13:34 ` [PATCH 02/22] iommu/amd: Fix wrong address masks in tlb flush code Joerg Roedel
2011-12-05 13:34 ` [PATCH 03/22] iommu/amd: Get the maximum number of PASIDs supported Joerg Roedel
2011-12-05 13:34 ` [PATCH 04/22] iommu/amd: Setup PPR log when supported by IOMMU Joerg Roedel
2011-12-05 13:34 ` [PATCH 05/22] iommu/amd: Enable GT mode " Joerg Roedel
2011-12-05 13:34 ` [PATCH 06/22] iommu/amd: Add iommuv2 flag to struct amd_iommu Joerg Roedel
2011-12-05 13:34 ` [PATCH 07/22] iommu/amd: Put IOMMUv2 capable devices in pt_domain Joerg Roedel
2011-12-05 13:34 ` [PATCH 08/22] iommu/amd: Implement notifier for PPR faults Joerg Roedel
2011-12-05 13:34 ` [PATCH 09/22] iommu/amd: Add amd_iommu_domain_direct_map function Joerg Roedel
2011-12-05 13:34 ` [PATCH 10/22] iommu/amd: Add support for IOMMUv2 domain mode Joerg Roedel
2011-12-05 13:34 ` [PATCH 11/22] iommu/amd: Implement IOMMUv2 TLB flushing routines Joerg Roedel
2011-12-05 13:34 ` [PATCH 12/22] iommu/amd: Implement functions to manage GCR3 table Joerg Roedel
2011-12-05 13:34 ` [PATCH 13/22] iommu/amd: Implement function to send PPR completions Joerg Roedel
2011-12-05 13:34 ` [PATCH 14/22] iommu/amd: Add function to get IOMMUv2 domain for pdev Joerg Roedel
2011-12-05 13:34 ` [PATCH 15/22] iommu/amd: Add device errata handling Joerg Roedel
2011-12-05 13:34 ` [PATCH 16/22] iommu/amd: Add stat counter for IOMMUv2 events Joerg Roedel
2011-12-05 13:34 ` [PATCH 17/22] iommu/amd: Add driver stub for AMD IOMMUv2 support Joerg Roedel
2011-12-05 13:34 ` [PATCH 18/22] iommu/amd: Implement device aquisition code for IOMMUv2 Joerg Roedel
2011-12-05 13:34 ` Joerg Roedel [this message]
2011-12-05 13:34 ` [PATCH 20/22] iommu/amd: Implement IO page-fault handler Joerg Roedel
2011-12-14 16:13 ` Jerome Glisse
2011-12-14 16:17 ` Joerg Roedel
2011-12-05 13:34 ` [PATCH 21/22] iommu/amd: Implement notifiers for IOMMUv2 Joerg Roedel
2011-12-05 13:34 ` [PATCH 22/22] iommu/amd: Add invalid_ppr callback Joerg Roedel
2011-12-08 20:47 ` [PATCH 0/22] Initial AMD IOMMUv2 support Jerome Glisse
2011-12-09 14:43 ` Joerg Roedel
2011-12-14 14:26 ` Joerg Roedel
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