From: Alex Shi <alex.shi@intel.com>
To: tglx@linutronix.de, mingo@redhat.com, hpa@zytor.com,
arnd@arndb.de, rostedt@goodmis.org, fweisbec@gmail.com
Cc: jeremy@goop.org, seto.hidetoshi@jp.fujitsu.com,
borislav.petkov@amd.com, alex.shi@intel.com, tony.luck@intel.com,
luto@mit.edu, riel@redhat.com, avi@redhat.com,
len.brown@intel.com, dhowells@redhat.com, yinghai@kernel.org,
ak@linux.intel.com, jbeulich@suse.com, akpm@linux-foundation.org,
eric.dumazet@gmail.com, akinobu.mita@gmail.com, cpw@sgi.com,
steiner@sgi.com, penberg@kernel.org, a.p.zijlstra@chello.nl,
hughd@google.com, kamezawa.hiroyu@jp.fujitsu.com,
viro@zeniv.linux.org.uk, linux-kernel@vger.kernel.org,
yongjie.ren@intel.com
Subject: [PATCH v7 8/8] x86/tlb: just do tlb flush on one of siblings of SMT
Date: Wed, 23 May 2012 22:15:55 +0800 [thread overview]
Message-ID: <1337782555-8088-9-git-send-email-alex.shi@intel.com> (raw)
In-Reply-To: <1337782555-8088-1-git-send-email-alex.shi@intel.com>
According to Intel's SDM, flush tlb on both of siblings of SMT is
just wasting time, no any benefit and hurt performance. Because SMT
siblings share the all levels TLB and page structure caches.
Random flush sibling can make mulitiple thread run more balance.
Here rand calculated from jiffies, that is a bit less heavy than
random32()(save 2/3 time on my NHM EP, and 1/2 on my SNB EP)
The patched tested with my macro benchmark munmap, that sent
to lkml before. http://lkml.org/lkml/2012/5/17/59
On my 2P * 4 cores * HT NHM EP machine, munmap system call speed
increased 10~15%, while average random memory access speed on other
LCPUs increase 12%.
On my 2P * 8 cores * HT SNB EP machine, munmap system call speed
increased 10~13%, while average random memory access speed on other
LCPUs increase 4~20%.
Signed-off-by: Alex Shi <alex.shi@intel.com>
---
arch/x86/mm/tlb.c | 30 +++++++++++++++++++++++++++---
1 files changed, 27 insertions(+), 3 deletions(-)
diff --git a/arch/x86/mm/tlb.c b/arch/x86/mm/tlb.c
index 0232e24..bc0a6fc 100644
--- a/arch/x86/mm/tlb.c
+++ b/arch/x86/mm/tlb.c
@@ -85,22 +85,46 @@ void native_flush_tlb_others(const struct cpumask *cpumask,
struct mm_struct *mm, unsigned long start,
unsigned long end)
{
+ int cpu;
+ unsigned long rand;
struct flush_tlb_info info;
+ cpumask_t flush_mask, *sblmask;
+
info.flush_mm = mm;
info.flush_start = start;
info.flush_end = end;
+ /* doing flush on both siblings of SMT is just wasting time */
+ cpumask_copy(&flush_mask, cpumask);
+ if (likely(smp_num_siblings > 1)) {
+ rand = jiffies;
+ /* See "Numerical Recipes in C", second edition, p. 284 */
+ rand = rand * 1664525L + 1013904223L;
+ rand &= 0x1;
+
+ for_each_cpu(cpu, &flush_mask) {
+ sblmask = cpu_sibling_mask(cpu);
+ if (cpumask_subset(sblmask, &flush_mask)) {
+ if (rand == 0)
+ cpu_clear(cpu, flush_mask);
+ else
+ cpu_clear(cpumask_next(cpu, sblmask),
+ flush_mask);
+ }
+ }
+ }
+
if (is_uv_system()) {
unsigned int cpu;
cpu = smp_processor_id();
- cpumask = uv_flush_tlb_others(cpumask, mm, start, end, cpu);
+ cpumask = uv_flush_tlb_others(&flush_mask, mm, start, end, cpu);
if (cpumask)
- smp_call_function_many(cpumask, flush_tlb_func,
+ smp_call_function_many(&flush_mask, flush_tlb_func,
&info, 1);
return;
}
- smp_call_function_many(cpumask, flush_tlb_func, &info, 1);
+ smp_call_function_many(&flush_mask, flush_tlb_func, &info, 1);
}
void flush_tlb_current_task(void)
--
1.7.5.4
next prev parent reply other threads:[~2012-05-23 14:18 UTC|newest]
Thread overview: 48+ messages / expand[flat|nested] mbox.gz Atom feed top
2012-05-23 14:15 [PATCH v7 0/8] x86 tlb optimisations Alex Shi
2012-05-23 14:15 ` [PATCH v7 1/8] x86/tlb_info: get last level TLB entry number of CPU Alex Shi
2012-05-23 14:15 ` [PATCH v7 2/8] x86/flush_tlb: try flush_tlb_single one by one in flush_tlb_range Alex Shi
2012-05-23 14:51 ` Jan Beulich
2012-05-24 6:41 ` Alex Shi
2012-05-24 8:12 ` Jan Beulich
2012-05-24 8:55 ` Alex Shi
2012-05-24 9:44 ` Jan Beulich
2012-05-24 14:36 ` Alex Shi
2012-05-25 2:43 ` Alex Shi
2012-05-23 14:15 ` [PATCH v7 3/8] x86/tlb: fall back to flush all when meet a THP large page Alex Shi
2012-05-23 14:15 ` [PATCH v7 4/8] x86/tlb: add tlb_flushall_shift for specific CPU Alex Shi
2012-05-23 14:15 ` [PATCH v7 5/8] x86/tlb: enable tlb flush range support for generic mmu and x86 Alex Shi
2012-05-23 14:15 ` [PATCH v7 6/8] x86/tlb: add tlb_flushall_shift knob into debugfs Alex Shi
2012-05-23 14:15 ` [PATCH v7 7/8] x86/tlb: replace INVALIDATE_TLB_VECTOR by CALL_FUNCTION_VECTOR Alex Shi
2012-05-23 14:15 ` Alex Shi [this message]
2012-05-23 15:05 ` [PATCH v7 8/8] x86/tlb: just do tlb flush on one of siblings of SMT Jan Beulich
2012-05-23 17:09 ` Peter Zijlstra
2012-05-23 17:15 ` Peter Zijlstra
2012-05-24 1:46 ` Andrew Lutomirski
2012-05-24 5:12 ` Alex Shi
2012-05-24 6:04 ` Borislav Petkov
2012-05-24 7:40 ` Peter Zijlstra
2012-05-24 13:19 ` Andrew Lutomirski
2012-05-24 13:23 ` Peter Zijlstra
2012-05-24 13:39 ` Arjan van de Ven
2012-05-24 13:54 ` Alex Shi
2012-05-24 14:18 ` Arjan van de Ven
2012-05-24 14:32 ` Alex Shi
2012-05-24 15:03 ` H. Peter Anvin
2012-05-25 0:24 ` Alex Shi
2012-05-24 16:08 ` Arjan van de Ven
2012-05-25 0:28 ` Alex Shi
2012-05-25 0:46 ` Arjan van de Ven
2012-05-24 8:32 ` Alex Shi
2012-05-24 8:42 ` Peter Zijlstra
2012-05-24 8:48 ` Alex Shi
2012-05-24 11:35 ` Rusty Russell
2012-05-24 14:03 ` Alex Shi
2012-05-24 9:27 ` Alex Shi
2012-05-24 9:42 ` Peter Zijlstra
2012-05-24 9:46 ` Jan Beulich
2012-05-24 14:06 ` Alex Shi
2012-05-24 8:43 ` Peter Zijlstra
2012-05-24 8:48 ` Jan Beulich
2012-05-24 9:02 ` Alex Shi
2012-05-24 9:45 ` Jan Beulich
2012-05-24 15:04 ` H. Peter Anvin
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