Re: [PATCH v7 2/8] x86/flush_tlb: try flush_tlb_single one by one in flush_tlb_range

["Jan Beulich" <JBeulich@suse.com>]

>>> On 24.05.12 at 10:55, Alex Shi <alex.shi@intel.com> wrote:
> On 05/24/2012 04:12 PM, Jan Beulich wrote:
> 
>>>>> On 24.05.12 at 08:41, Alex Shi <alex.shi@intel.com> wrote:
>>> So, the following change should be more safe for PV?
>>>
>>> -       if (va == TLB_FLUSH_ALL) {
>>> -               args->op.cmd = MMUEXT_TLB_FLUSH_MULTI;
>>> -       } else {
>>> -               args->op.cmd = MMUEXT_INVLPG_MULTI;
>>> -               args->op.arg1.linear_addr = va;
>>> -       }
>>> +       args->op.cmd = MMUEXT_TLB_FLUSH_MULTI;
>> 
>> This would be safe ...
>> 
>>> +       if (start != TLB_FLUSH_ALL)
>>> +               args->op.arg1.linear_addr = start;
>> 
>> ... and then this superfluous, but it'd result in an unconditional
>> full TLB flush. When start and end (or perhaps end-1, assuming
>> end is not inclusive) are on the same page, MMUEXT_INVLPG_MULTI
>> should be used; MMUEXT_TLB_FLUSH_MULTI might need to be
>> used in all other cases, unless you want to split multi-page, non-
>> global invalidations into multiple MMUEXT_INVLPG_MULTI-s (which
>> would appear to be what the whole patch aims at).
> 
> 
>         args->op.cmd = MMUEXT_TLB_FLUSH_MULTI;
> -       if (start != TLB_FLUSH_ALL)
> +       if (start != TLB_FLUSH_ALL && (end - start) < PAGE_SIZE) {

Assuming 'end' is not inclusive (you didn't clarify that),

       if (start != TLB_FLUSH_ALL && (end - start) <= PAGE_SIZE) {

(and only if 'start' is guaranteed to be page aligned).

> +               args->op.cmd = MMUEXT_INVLPG_MULTI;
>                 args->op.arg1.linear_addr = start;
> +       }
> 
> So, above it correct code for xen?
> As to the xen optimisation of flush range, it is may better to be done
> in a separate patch.

Agreed.

Jan