[PATCH 02/10] perf, x86: Rework counter reservation code

[Robert Richter <robert.richter@amd.com>]

We will have non-countinous counter masks with the AMD family 15h pmu.
Rework the code for later use of counter masks.

No functional changes.

Signed-off-by: Robert Richter <robert.richter@amd.com>
---
 arch/x86/kernel/cpu/perf_event.c |   25 +++++++++++--------------
 1 files changed, 11 insertions(+), 14 deletions(-)

diff --git a/arch/x86/kernel/cpu/perf_event.c b/arch/x86/kernel/cpu/perf_event.c
index e7540c8..ac1cb32 100644
--- a/arch/x86/kernel/cpu/perf_event.c
+++ b/arch/x86/kernel/cpu/perf_event.c
@@ -132,29 +132,26 @@ static DEFINE_MUTEX(pmc_reserve_mutex);
 
 static bool reserve_pmc_hardware(void)
 {
-	int i;
+	int idx1, idx2;
 
-	for (i = 0; i < x86_pmu.num_counters; i++) {
-		if (!reserve_perfctr_nmi(x86_pmu_event_addr(i)))
+	for (idx1 = 0; idx1 < x86_pmu.num_counters; idx1++) {
+		if (!reserve_perfctr_nmi(x86_pmu_event_addr(idx1)))
 			goto perfctr_fail;
-	}
-
-	for (i = 0; i < x86_pmu.num_counters; i++) {
-		if (!reserve_evntsel_nmi(x86_pmu_config_addr(i)))
+		if (!reserve_evntsel_nmi(x86_pmu_config_addr(idx1)))
 			goto eventsel_fail;
 	}
 
 	return true;
 
 eventsel_fail:
-	for (i--; i >= 0; i--)
-		release_evntsel_nmi(x86_pmu_config_addr(i));
-
-	i = x86_pmu.num_counters;
-
+	release_perfctr_nmi(x86_pmu_event_addr(idx1));
 perfctr_fail:
-	for (i--; i >= 0; i--)
-		release_perfctr_nmi(x86_pmu_event_addr(i));
+	for (idx2 = 0; idx2 < x86_pmu.num_counters; idx2++) {
+		if (idx2 >= idx1)
+			break;
+		release_evntsel_nmi(x86_pmu_config_addr(idx2));
+		release_perfctr_nmi(x86_pmu_event_addr(idx2));
+	}
 
 	return false;
 }
-- 
1.7.8.4