From: "Fenghua Yu" <fenghua.yu@intel.com>
To: "Ingo Molnar" <mingo@elte.hu>,
"Thomas Gleixner" <tglx@linutronix.de>,
"H Peter Anvin" <hpa@zytor.com>,
"Linus Torvalds" <torvalds@linux-foundation.org>,
"Andrew Morton" <akpm@linux-foundation.org>,
"Asit K Mallick" <asit.k.mallick@intel.com>,
"Tony Luck" <tony.luck@intel.com>,
"Arjan Dan De Ven" <arjan@linux.intel.com>,
"Suresh B Siddha" <suresh.b.siddha@intel.com>,
"Len Brown" <len.brown@intel.com>,
"Srivatssa S. Bhat" <srivatsa.bhat@linux.vnet.ibm.com>,
"Randy Dunlap" <rdunlap@xenotime.net>,
"Chen Gong" <gong.chen@linux.intel.com>,
"linux-kernel" <linux-kernel@vger.kernel.org>,
"linux-pm" <linux-pm@vger.kernel.org>, "x86" <x86@kernel.org>
Cc: "Fenghua Yu" <fenghua.yu@intel.com>
Subject: [PATCH v7 06/12] start_cpu0() is defined in head_64.S for 64-bit. The function sets up stack and jumps to start_secondary() for CPU0 wake up.
Date: Thu, 23 Aug 2012 17:56:05 -0700 [thread overview]
Message-ID: <1345769771-27019-7-git-send-email-fenghua.yu@intel.com> (raw)
In-Reply-To: <1345769771-27019-1-git-send-email-fenghua.yu@intel.com>
From: Fenghua Yu <fenghua.yu@intel.com>
Signed-off-by: Fenghua Yu <fenghua.yu@intel.com>
---
arch/x86/kernel/head_64.S | 15 +++++++++++++++
1 files changed, 15 insertions(+), 0 deletions(-)
diff --git a/arch/x86/kernel/head_64.S b/arch/x86/kernel/head_64.S
index 94bf9cc..3faac8a 100644
--- a/arch/x86/kernel/head_64.S
+++ b/arch/x86/kernel/head_64.S
@@ -252,6 +252,21 @@ ENTRY(secondary_startup_64)
pushq %rax # target address in negative space
lretq
+#ifdef CONFIG_HOTPLUG_CPU
+/*
+ * Boot CPU0 entry point. It's called from play_dead(). Everything has been set
+ * up already except stack. We just set up stack here. Then call
+ * start_secondary().
+ */
+ENTRY(start_cpu0)
+ movq stack_start(%rip),%rsp
+ movq initial_code(%rip),%rax
+ pushq $0 # fake return address to stop unwinder
+ pushq $__KERNEL_CS # set correct cs
+ pushq %rax # target address in negative space
+ lretq
+#endif
+
/* SMP bootup changes these two */
__REFDATA
.align 8
--
1.7.2
next prev parent reply other threads:[~2012-08-24 1:12 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2012-08-24 0:55 [PATCH v7 0/12] x86: Arbitrary CPU hot(un)plug support Fenghua Yu
2012-08-24 0:56 ` [PATCH v7 01/12] Documentations/cpu-hotplug.tx, kernel-parameters.txt: Add x86 CPU0 online/offline feature Fenghua Yu
2012-08-24 0:56 ` [PATCH v7 02/12] x86/Kconfig: Add config switch for CPU0 hotplug Fenghua Yu
2012-08-24 9:34 ` Borislav Petkov
2012-08-24 19:53 ` Yu, Fenghua
2012-08-24 0:56 ` [PATCH v7 03/12] x86/topology.c: Support functions for CPU0 online/offline Fenghua Yu
2012-08-24 0:56 ` [PATCH v7 04/12] Don't offline CPU0 if any PIC irq can not be migrated out of it Fenghua Yu
2012-08-24 9:39 ` Borislav Petkov
2012-08-24 0:56 ` [PATCH v7 05/12] Because x86 BIOS requires CPU0 to resume from sleep, suspend or hibernate can't be executed if CPU0 is detected offline. To make suspend or hibernate and further resume succeed, CPU0 must be online Fenghua Yu
2012-08-24 9:42 ` Borislav Petkov
2012-08-24 0:56 ` Fenghua Yu [this message]
2012-08-24 0:56 ` [PATCH v7 07/12] start_cpu0() is defined in head_32.S for 32-bit. The function sets up stack and jumps to start_secondary() for CPU0 wake up Fenghua Yu
2012-08-24 9:35 ` Borislav Petkov
2012-08-24 0:56 ` [PATCH v7 08/12] Instead of waiting for STARTUP after INITs, BSP will execute the BIOS boot-strap code which is not a desired behavior for waking up BSP. To avoid the boot-strap code, wake up CPU0 by NMI instead Fenghua Yu
2012-08-24 0:56 ` [PATCH v7 09/12] During CPU0 online, enable x2apic, set_numa_node Fenghua Yu
2012-08-24 0:56 ` [PATCH v7 10/12] Ask the first online CPU to save mtrr instead of asking BSP. BSP could be offline when mtrr_save_state() is called Fenghua Yu
2012-08-24 0:56 ` [PATCH v7 11/12] x86/i387.c: Thread xstate is initialized only on CPU0 once Fenghua Yu
2012-08-24 0:56 ` [PATCH v7 12/12] x86/topology.c: debug CPU0 hotplug Fenghua Yu
2012-08-24 2:51 ` [PATCH v7 0/12] x86: Arbitrary CPU hot(un)plug support H. Peter Anvin
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