From: Andi Kleen <andi@firstfloor.org>
To: linux-kernel@vger.kernel.org
Cc: acme@redhat.com, peterz@infradead.org, jolsa@redhat.com,
eranian@google.com, mingo@kernel.org, namhyung@kernel.org,
Andi Kleen <ak@linux.intel.com>
Subject: [PATCH 26/32] perf, x86: improve sysfs event mapping with event string
Date: Tue, 30 Oct 2012 17:34:17 -0700 [thread overview]
Message-ID: <1351643663-23828-27-git-send-email-andi@firstfloor.org> (raw)
In-Reply-To: <1351643663-23828-1-git-send-email-andi@firstfloor.org>
From: Stephane Eranian <eranian@google.com>
This patch extends Jiri's changes to make generic
events mapping visible via sysfs. The patch extends
the mechanism to non-generic events by allowing
the mappings to be hardcoded in strings.
This mechanism will be used by the PEBS-LL patch
later on.
[AK: Make events_sysfs_show unstatic again to fix compilation]
Signed-off-by: Stephane Eranian <eranian@google.com>
Signed-off-by: Andi Kleen <ak@linux.intel.com>
---
arch/x86/kernel/cpu/perf_event.c | 28 +++++++++++++---------------
arch/x86/kernel/cpu/perf_event.h | 26 ++++++++++++++++++++++++++
2 files changed, 39 insertions(+), 15 deletions(-)
diff --git a/arch/x86/kernel/cpu/perf_event.c b/arch/x86/kernel/cpu/perf_event.c
index 57bb4ce..af38635 100644
--- a/arch/x86/kernel/cpu/perf_event.c
+++ b/arch/x86/kernel/cpu/perf_event.c
@@ -1317,20 +1317,22 @@ static struct attribute_group x86_pmu_format_group = {
.attrs = NULL,
};
-struct perf_pmu_events_attr {
- struct device_attribute attr;
- u64 id;
-};
-
/*
* Remove all undefined events (x86_pmu.event_map(id) == 0)
* out of events_attr attributes.
*/
static void __init filter_events(struct attribute **attrs)
{
+ struct device_attribute *d;
+ struct perf_pmu_events_attr *pmu_attr;
int i, j;
for (i = 0; attrs[i]; i++) {
+ d = (struct device_attribute *)attrs[i];
+ pmu_attr = container_of(d, struct perf_pmu_events_attr, attr);
+ /* str trumps id */
+ if (pmu_attr->event_str)
+ continue;
if (x86_pmu.event_map(i))
continue;
@@ -1342,24 +1344,20 @@ static void __init filter_events(struct attribute **attrs)
}
}
-static ssize_t events_sysfs_show(struct device *dev, struct device_attribute *attr,
+ssize_t events_sysfs_show(struct device *dev, struct device_attribute *attr,
char *page)
{
struct perf_pmu_events_attr *pmu_attr = \
container_of(attr, struct perf_pmu_events_attr, attr);
u64 config = x86_pmu.event_map(pmu_attr->id);
- return x86_pmu.events_sysfs_show(page, config);
-}
-#define EVENT_VAR(_id) event_attr_##_id
-#define EVENT_PTR(_id) &event_attr_##_id.attr.attr
+ /* string trumps id */
+ if (pmu_attr->event_str)
+ return sprintf(page, "%s", pmu_attr->event_str);
-#define EVENT_ATTR(_name, _id) \
-static struct perf_pmu_events_attr EVENT_VAR(_id) = { \
- .attr = __ATTR(_name, 0444, events_sysfs_show, NULL), \
- .id = PERF_COUNT_HW_##_id, \
-};
+ return x86_pmu.events_sysfs_show(page, config);
+}
EVENT_ATTR(cpu-cycles, CPU_CYCLES );
EVENT_ATTR(instructions, INSTRUCTIONS );
diff --git a/arch/x86/kernel/cpu/perf_event.h b/arch/x86/kernel/cpu/perf_event.h
index 2ef5b20..12ae625 100644
--- a/arch/x86/kernel/cpu/perf_event.h
+++ b/arch/x86/kernel/cpu/perf_event.h
@@ -425,6 +425,29 @@ do { \
#define ERF_NO_HT_SHARING 1
#define ERF_HAS_RSP_1 2
+#define EVENT_VAR(_id) event_attr_##_id
+#define EVENT_PTR(_id) &event_attr_##_id.attr.attr
+
+#define EVENT_ATTR(_name, _id) \
+static struct perf_pmu_events_attr EVENT_VAR(_id) = { \
+ .attr = __ATTR(_name, 0444, events_sysfs_show, NULL), \
+ .id = PERF_COUNT_HW_##_id, \
+ .event_str = NULL, \
+};
+
+#define EVENT_ATTR_STR(_name, v, str) \
+static struct perf_pmu_events_attr event_attr_##v = { \
+ .attr = __ATTR(_name, 0444, events_sysfs_show, NULL),\
+ .id = 0, \
+ .event_str = str, \
+};
+
+struct perf_pmu_events_attr {
+ struct device_attribute attr;
+ u64 id;
+ const char *event_str;
+};
+
extern struct x86_pmu x86_pmu __read_mostly;
DECLARE_PER_CPU(struct cpu_hw_events, cpu_hw_events);
@@ -643,6 +666,9 @@ int p6_pmu_init(void);
int knc_pmu_init(void);
+ssize_t events_sysfs_show(struct device *dev, struct device_attribute *attr,
+ char *page);
+
#else /* CONFIG_CPU_SUP_INTEL */
static inline void reserve_ds_buffers(void)
--
1.7.7.6
next prev parent reply other threads:[~2012-10-31 0:36 UTC|newest]
Thread overview: 42+ messages / expand[flat|nested] mbox.gz Atom feed top
2012-10-31 0:33 perf PMU support for Haswell v5 Andi Kleen
2012-10-31 0:33 ` [PATCH 01/32] perf, x86: Add PEBSv2 record support Andi Kleen
2012-10-31 0:33 ` [PATCH 02/32] perf, x86: Basic Haswell PMU support v2 Andi Kleen
2012-10-31 0:33 ` [PATCH 03/32] perf, x86: Basic Haswell PEBS support v3 Andi Kleen
2012-10-31 0:33 ` [PATCH 04/32] perf, x86: Support the TSX intx/intx_cp qualifiers v2 Andi Kleen
2012-10-31 0:33 ` [PATCH 05/32] perf, kvm: Support the intx/intx_cp modifiers in KVM arch perfmon emulation v3 Andi Kleen
2012-10-31 10:27 ` Gleb Natapov
2012-10-31 10:32 ` Andi Kleen
2012-10-31 10:38 ` Gleb Natapov
2012-10-31 16:43 ` Andi Kleen
2012-11-01 16:50 ` Andi Kleen
2012-10-31 0:33 ` [PATCH 06/32] perf, x86: Support PERF_SAMPLE_ADDR on Haswell Andi Kleen
2012-10-31 0:33 ` [PATCH 07/32] perf, x86: Support Haswell v4 LBR format Andi Kleen
2012-10-31 0:33 ` [PATCH 08/32] perf, x86: Disable LBR recording for unknown LBR_FMT Andi Kleen
2012-10-31 0:34 ` [PATCH 09/32] perf, x86: Support LBR filtering by INTX/NOTX/ABORT v2 Andi Kleen
2012-10-31 0:34 ` [PATCH 10/32] perf, tools: Add abort_tx,no_tx,in_tx branch filter options to perf record -j v3 Andi Kleen
2012-10-31 0:34 ` [PATCH 11/32] perf, tools: Support sorting by intx, abort branch flags Andi Kleen
2012-10-31 0:34 ` [PATCH 12/32] perf, x86: Support full width counting Andi Kleen
2012-10-31 0:34 ` [PATCH 13/32] perf, x86: Avoid checkpointed counters causing excessive TSX aborts v3 Andi Kleen
2012-10-31 0:34 ` [PATCH 14/32] perf, core: Add a concept of a weightened sample Andi Kleen
2012-10-31 0:34 ` [PATCH 15/32] perf, x86: Support weight samples for PEBS Andi Kleen
2012-10-31 0:34 ` [PATCH 16/32] perf, tools: Add support for weight v3 Andi Kleen
2012-10-31 0:34 ` [PATCH 17/32] perf, tools: Handle XBEGIN like a jump Andi Kleen
2012-11-14 6:35 ` [tip:perf/core] perf annotate: " tip-bot for Andi Kleen
2012-10-31 0:34 ` [PATCH 18/32] perf, x86: Support for printing PMU state on spurious PMIs v3 Andi Kleen
2012-10-31 0:34 ` [PATCH 19/32] perf, core: Add generic transaction flags v2 Andi Kleen
2012-10-31 0:34 ` [PATCH 20/32] perf, x86: Add Haswell specific transaction flag reporting Andi Kleen
2012-10-31 0:34 ` [PATCH 21/32] perf, tools: Add support for record transaction flags v2 Andi Kleen
2012-10-31 0:34 ` [PATCH 22/32] perf, tools: Point --sort documentation to --help Andi Kleen
2012-10-31 0:34 ` [PATCH 23/32] perf, tools: Add browser support for transaction flags v2 Andi Kleen
2012-10-31 9:02 ` [PATCH] perf, tools: Fix WERROR=1 build with transction flags and fix browser Andi Kleen
2012-10-31 0:34 ` [PATCH 24/32] perf, tools: Add arbitary aliases and support names with - Andi Kleen
2012-10-31 0:34 ` [PATCH 25/32] tools, perf: Add a precise event qualifier Andi Kleen
2012-10-31 0:34 ` Andi Kleen [this message]
2012-10-31 0:34 ` [PATCH 27/32] perf, x86: Support CPU specific sysfs events Andi Kleen
2012-11-07 14:41 ` Stephane Eranian
2012-10-31 0:34 ` [PATCH 28/32] perf, x86: Add Haswell TSX event aliases v2 Andi Kleen
2012-10-31 0:34 ` [PATCH 29/32] perf, tools: Add perf stat --transaction v2 Andi Kleen
2012-10-31 0:34 ` [PATCH 30/32] perf, x86: Add a Haswell precise instructions event v2 Andi Kleen
2012-10-31 0:34 ` [PATCH 31/32] perf, tools: Default to cpu// for events v3 Andi Kleen
2012-10-31 0:34 ` [PATCH 32/32] perf, tools: List kernel supplied event aliases in perf list v2 Andi Kleen
2012-11-10 1:27 perf PMU support for Haswell v6 Andi Kleen
2012-11-10 1:27 ` [PATCH 26/32] perf, x86: improve sysfs event mapping with event string Andi Kleen
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