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From: "Fenghua Yu" <fenghua.yu@intel.com>
To: "H Peter Anvin" <hpa@zytor.com>, "Ingo Molnar" <mingo@elte.hu>,
	"Thomas Gleixner" <tglx@linutronix.de>,
	"Asit K Mallick" <asit.k.mallick@intel.com>,
	"Tigran Aivazian" <tigran@aivazian.fsnet.co.uk>,
	"Yinghai Lu" <yinghai@kernel.org>,
	"Andreas Herrmann" <andreas.herrmann3@amd.com>,
	"Borislav Petkov" <borislav.petkov@amd.com>,
	"linux-kernel" <linux-kernel@vger.kernel.org>,
	"x86" <x86@kernel.org>
Cc: "Fenghua Yu" <fenghua.yu@intel.com>
Subject: [PATCH v4 06/11] x86/tlbflush.h: Define __native_flush_tlb_global_irq_disabled()
Date: Thu, 20 Dec 2012 11:48:08 -0800	[thread overview]
Message-ID: <1356032893-2730-7-git-send-email-fenghua.yu@intel.com> (raw)
In-Reply-To: <1356032893-2730-1-git-send-email-fenghua.yu@intel.com>

From: Fenghua Yu <fenghua.yu@intel.com>

This function is called in __native_flush_tlb_global() and after
apply_microcode_early().

Signed-off-by: Fenghua Yu <fenghua.yu@intel.com>
---
 arch/x86/include/asm/tlbflush.h | 18 ++++++++++++------
 1 file changed, 12 insertions(+), 6 deletions(-)

diff --git a/arch/x86/include/asm/tlbflush.h b/arch/x86/include/asm/tlbflush.h
index 0fee48e..50a7fc0 100644
--- a/arch/x86/include/asm/tlbflush.h
+++ b/arch/x86/include/asm/tlbflush.h
@@ -20,10 +20,20 @@ static inline void __native_flush_tlb(void)
 	native_write_cr3(native_read_cr3());
 }
 
+static inline void __native_flush_tlb_global_irq_disabled(void)
+{
+	unsigned long cr4;
+
+	cr4 = native_read_cr4();
+	/* clear PGE */
+	native_write_cr4(cr4 & ~X86_CR4_PGE);
+	/* write old PGE again and flush TLBs */
+	native_write_cr4(cr4);
+}
+
 static inline void __native_flush_tlb_global(void)
 {
 	unsigned long flags;
-	unsigned long cr4;
 
 	/*
 	 * Read-modify-write to CR4 - protect it from preemption and
@@ -32,11 +42,7 @@ static inline void __native_flush_tlb_global(void)
 	 */
 	raw_local_irq_save(flags);
 
-	cr4 = native_read_cr4();
-	/* clear PGE */
-	native_write_cr4(cr4 & ~X86_CR4_PGE);
-	/* write old PGE again and flush TLBs */
-	native_write_cr4(cr4);
+	__native_flush_tlb_global_irq_disabled();
 
 	raw_local_irq_restore(flags);
 }
-- 
1.8.0.1


  parent reply	other threads:[~2012-12-21  2:51 UTC|newest]

Thread overview: 19+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2012-12-20 19:48 [PATCH v4 00/11] x86/microcode: Early load microcode Fenghua Yu
2012-12-20 19:48 ` [PATCH v4 01/11] Documentation/x86: " Fenghua Yu
2012-12-20 19:48 ` [PATCH v4 02/11] x86/microcode_intel.h: Define functions and macros for early loading ucode Fenghua Yu
2012-12-20 19:48 ` [PATCH v4 03/11] x86/common.c: Make have_cpuid_p() a global function and load ucode or show ucode loading info on AP Fenghua Yu
2012-12-20 19:48 ` [PATCH v4 04/11] x86/microcode_core_early.c: Define interfaces for early loading ucode Fenghua Yu
2012-12-20 19:48 ` [PATCH v4 05/11] x86/microcode_intel_lib.c: Early update ucode on Intel's CPU Fenghua Yu
2012-12-20 19:48 ` Fenghua Yu [this message]
2012-12-20 19:48 ` [PATCH v4 07/11] x86/microcode_intel_early.c: " Fenghua Yu
2012-12-20 19:48 ` [PATCH v4 08/11] x86/head_32.S: Early update ucode in 32-bit Fenghua Yu
2012-12-20 19:48 ` [PATCH v4 09/11] x86/head64.c: Early update ucode in 64-bit Fenghua Yu
2012-12-21  4:09   ` Yinghai Lu
2012-12-21  4:44     ` Yu, Fenghua
2012-12-21  5:07     ` Yu, Fenghua
     [not found]       ` <CAE9FiQVHuNkT3BLUW3hJf6mWbNq+kWmohwSNJMxxO1sYvyCxOQ@mail.gmail.com>
2012-12-21  5:48         ` H. Peter Anvin
2012-12-20 19:48 ` [PATCH v4 10/11] x86/mm/init.c: Copy ucode from initrd image to kernel memory Fenghua Yu
2012-12-20 19:48 ` [PATCH v4 11/11] x86/Kconfig: Configurations to enable/disable the feature Fenghua Yu
2012-12-21  9:04 ` [PATCH v4 00/11] x86/microcode: Early load microcode Michael Tokarev
2012-12-21 15:09   ` Yu, Fenghua
2012-12-21 15:14     ` Borislav Petkov

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