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From: "Alexander Shiyan" <shc_work@mail.ru>
To: "Ezequiel Garcia" <ezequiel.garcia@free-electrons.com>
Cc: "Lior Amsalem" <alior@marvell.com>,
	"Thomas Petazzoni" <thomas.petazzoni@free-electrons.com>,
	"Russell King" <linux@arm.linux.org.uk>,
	"Jason Cooper" <jason@lakedaemon.net>,
	"Andrew Lunn" <andrew@lunn.ch>,
	linux-kernel@vger.kernel.org,
	"Gregory Clement" <gregory.clement@free-electrons.com>,
	linux-arm-kernel@lists.infradead.org,
	"Sebastian Hesselbarth" <sebastian.hesselbarth@gmail.com>
Subject: Re: [PATCH 1/3] ARM: Introduce atomic MMIO clear/set
Date: Sat, 10 Aug 2013 19:43:08 +0400	[thread overview]
Message-ID: <1376149388.716003514@f150.i.mail.ru> (raw)
In-Reply-To: <20130810140927.GC3080@localhost>

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> On Sat, Aug 10, 2013 at 11:02:38AM -0300, Ezequiel Garcia wrote:
> > On Sat, Aug 10, 2013 at 04:49:28PM +0400, Alexander Shiyan wrote:
> > > > Some SoC have MMIO regions that are shared across orthogonal
> > > > subsystems. This commit implements a possible solution for the
> > > > thread-safe access of such regions through a spinlock-protected API
> > > > with clear-set semantics.
> > > > 
> > > > Concurrent access is protected with a single spinlock for the
> > > > entire MMIO address space. While this protects shared-registers,
> > > > it also serializes access to unrelated/unshared registers.
[...]
> > > > +void atomic_io_clear_set(void __iomem *reg, u32 clear, u32 set)
> > > > +{
> > > > +	spin_lock(&__io_lock);
> > > > +	writel((readl(reg) & ~clear) | set, reg);
> > > > +	spin_unlock(&__io_lock);
> > > > +}
> > > > +EXPORT_SYMBOL(atomic_io_clear_set);
> > > 
> > > So, one lock is used to all possible registers?
> > > Seems a regmap-mmio can be used for such access.
> > > 
> > 
> > Thanks for the hint! Quite frankly, I wasn't familiar with regmap-mmio.
> > 
> > However, after reading some code, I fail to see how that helps in this case.
> > 
> > Note that we need to access the *same* MMIO address from completely
> > different (and unrelated) drivers, such as watchdog and clocksource.
> > 
> > So I wonder who would "own" the regmap descriptor, and how does the other
> > one gets aware of that descriptor?
> > 
> > In addition given we can use orion_wdt (originally meant for mach-kirkwood)
> > to support mvebu SoC watchdog, we need to sort this out in a completely
> > multiplatform capable way.
> > 
> > Ideas?
> 
> Answering myself...
> 
> How about using drivers/mfd/syscon.c to create the regmap owner for the shared
> register (TIMER_CTRL in this case, but others might appear) ?
> 
> Or adding a new mfd implementation if syscon does not fit ?
> 
> Does this sound like an overkill ?

Yes, syscon is designed especially for such cases.

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  reply	other threads:[~2013-08-10 15:43 UTC|newest]

Thread overview: 17+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2013-08-10 12:42 [PATCH 0/3] Introduce atomic MMIO register clear-set Ezequiel Garcia
2013-08-10 12:43 ` [PATCH 1/3] ARM: Introduce atomic MMIO clear/set Ezequiel Garcia
2013-08-10 12:49   ` Alexander Shiyan
2013-08-10 14:02     ` Ezequiel Garcia
2013-08-10 14:09       ` Ezequiel Garcia
2013-08-10 15:43         ` Alexander Shiyan [this message]
2013-08-10 15:55           ` Ezequiel Garcia
2013-08-12 15:46             ` Ezequiel Garcia
2013-08-12 16:44               ` Sebastian Hesselbarth
2013-08-12 17:09                 ` Ezequiel Garcia
2013-08-12 18:29   ` Will Deacon
2013-08-19 16:59     ` Ezequiel Garcia
2013-08-20 14:32       ` Matt Sealey
2013-08-20 14:52         ` Ezequiel Garcia
2013-08-20 15:04           ` Will Deacon
2013-08-10 12:43 ` [PATCH 2/3] clocksource: orion: Use atomic access for shared registers Ezequiel Garcia
2013-08-10 12:43 ` [PATCH 3/3] watchdog: " Ezequiel Garcia

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