[PATCH 0/4] x86: Add and use support for clflushopt

[Ross Zwisler <ross.zwisler@linux.intel.com>]

This patch series adds support for the new clflushopt instruction and then
uses it in a few appropriate places in x86 specific code.  It does this using
the alternatives mechanism, so any platforms without support for clflushopt
will continue to use clflush instead.

clflushopt was announced in the document "Intel Architecture Instruction Set
Extensions Programming Reference" with Ref # 319433-018.

http://download-software.intel.com/sites/default/files/managed/50/1a/319433-018.pdf

clflushopt has the same flushing behavior as clflush, but has more relaxed
ordering.  clflushopt must be explicitly ordered by sfence or mfence.

The inline assembly for clflushopt was implemented using %P so that the
generated addresses will always be absolute instead of sometimes being RIP
relative.  This is necessary for the alternatives code to behave correctly.

Ross Zwisler (4):
  x86: Add support for clflushopt
  x86: Use clflushopt in clflush_cache_range
  x86: Use clflushopt in drm_clflush_page
  x86: Use clflushopt in drm_clflush_virt_range

 arch/x86/include/asm/cpufeature.h    |    1 +
 arch/x86/include/asm/special_insns.h |    8 ++++++++
 arch/x86/mm/pageattr.c               |    8 ++++----
 drivers/gpu/drm/drm_cache.c          |   10 ++++++++--
 4 files changed, 21 insertions(+), 6 deletions(-)

-- 
1.7.10.4