From: Ross Zwisler <ross.zwisler@linux.intel.com>
To: linux-kernel@vger.kernel.org
Cc: Ross Zwisler <ross.zwisler@linux.intel.com>,
H Peter Anvin <h.peter.anvin@intel.com>,
Ingo Molnar <mingo@kernel.org>,
Thomas Gleixner <tglx@linutronix.de>
Subject: [PATCH 1/4] x86: Add support for clflushopt
Date: Wed, 26 Feb 2014 12:06:49 -0700 [thread overview]
Message-ID: <1393441612-19729-2-git-send-email-ross.zwisler@linux.intel.com> (raw)
In-Reply-To: <1393441612-19729-1-git-send-email-ross.zwisler@linux.intel.com>
Add support for the new clflushopt instruction. This instruction was
announced in the document "Intel Architecture Instruction Set Extensions
Programming Reference" with Ref # 319433-018.
http://download-software.intel.com/sites/default/files/managed/50/1a/319433-018.pdf
Signed-off-by: Ross Zwisler <ross.zwisler@linux.intel.com>
Cc: H Peter Anvin <h.peter.anvin@intel.com>
Cc: Ingo Molnar <mingo@kernel.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
---
arch/x86/include/asm/cpufeature.h | 1 +
arch/x86/include/asm/special_insns.h | 8 ++++++++
2 files changed, 9 insertions(+)
diff --git a/arch/x86/include/asm/cpufeature.h b/arch/x86/include/asm/cpufeature.h
index 89270b4..bfad1ad 100644
--- a/arch/x86/include/asm/cpufeature.h
+++ b/arch/x86/include/asm/cpufeature.h
@@ -219,6 +219,7 @@
#define X86_FEATURE_RDSEED (9*32+18) /* The RDSEED instruction */
#define X86_FEATURE_ADX (9*32+19) /* The ADCX and ADOX instructions */
#define X86_FEATURE_SMAP (9*32+20) /* Supervisor Mode Access Prevention */
+#define X86_FEATURE_CLFLSHOPT (9*32+23) /* "clflushopt" CLFLUSHOPT instruction */
/*
* BUG word(s)
diff --git a/arch/x86/include/asm/special_insns.h b/arch/x86/include/asm/special_insns.h
index 645cad2..617389a 100644
--- a/arch/x86/include/asm/special_insns.h
+++ b/arch/x86/include/asm/special_insns.h
@@ -191,6 +191,14 @@ static inline void clflush(volatile void *__p)
asm volatile("clflush %0" : "+m" (*(volatile char __force *)__p));
}
+static inline void clflushopt(volatile void *__p)
+{
+ alternative_io(".byte " __stringify(NOP_DS_PREFIX) "; clflush %P0",
+ ".byte 0x66; clflush %P0",
+ X86_FEATURE_CLFLSHOPT,
+ "+m" (*(volatile char __force *)__p));
+}
+
#define nop() asm volatile ("nop")
--
1.7.10.4
next prev parent reply other threads:[~2014-02-26 19:09 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-02-26 19:06 [PATCH 0/4] x86: Add and use " Ross Zwisler
2014-02-26 19:06 ` Ross Zwisler [this message]
2014-02-27 16:27 ` [tip:x86/cpufeature] x86: Add support for the clflushopt instruction tip-bot for Ross Zwisler
2014-02-26 19:06 ` [PATCH 2/4] x86: Use clflushopt in clflush_cache_range Ross Zwisler
2014-02-27 16:30 ` [tip:x86/cpu] " tip-bot for Ross Zwisler
2014-02-26 19:06 ` [PATCH 3/4] x86: Use clflushopt in drm_clflush_page Ross Zwisler
2014-02-27 16:30 ` [tip:x86/cpu] " tip-bot for Ross Zwisler
2014-02-26 19:06 ` [PATCH 4/4] x86: Use clflushopt in drm_clflush_virt_range Ross Zwisler
2014-02-27 16:30 ` [tip:x86/cpu] " tip-bot for Ross Zwisler
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