* [PATCH 2/4] w1: mxc_w1: Optimize mxc_w1_ds2_reset_bus()
2014-05-08 7:56 [PATCH 1/4] w1: mxc_w1: Fix incorrect "presence" status Alexander Shiyan
@ 2014-05-08 7:56 ` Alexander Shiyan
2014-05-08 7:56 ` [PATCH 3/4] w1: mxc_w1: Perform a software reset at startup Alexander Shiyan
2014-05-08 7:56 ` [PATCH 4/4] w1: mxc_w1: Optimize mxc_w1_ds2_touch_bit() Alexander Shiyan
2 siblings, 0 replies; 4+ messages in thread
From: Alexander Shiyan @ 2014-05-08 7:56 UTC (permalink / raw)
To: linux-kernel; +Cc: Evgeniy Polyakov, Sascha Hauer, Shawn Guo, Alexander Shiyan
According to the i.MX reference manual, the reset procedure and
"presence" pulse takes 511 and 512 us, respectively. Measurement for
i.MX27 is about 1100 us. There is no need to wait Reset+Presence
more than this time.
This patch optimizes mxc_w1_ds2_reset_bus() function to use proper
value for delay after w1 bus reset. Nevertheless, a small margin for
the timeout has been added for the case if clock frequency is inaccurate.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
---
drivers/w1/masters/mxc_w1.c | 32 +++++++++++++++-----------------
1 file changed, 15 insertions(+), 17 deletions(-)
diff --git a/drivers/w1/masters/mxc_w1.c b/drivers/w1/masters/mxc_w1.c
index a5df5e8..0d05abe 100644
--- a/drivers/w1/masters/mxc_w1.c
+++ b/drivers/w1/masters/mxc_w1.c
@@ -15,16 +15,13 @@
#include <linux/clk.h>
#include <linux/delay.h>
#include <linux/io.h>
+#include <linux/jiffies.h>
#include <linux/module.h>
#include <linux/platform_device.h>
#include "../w1.h"
#include "../w1_int.h"
-/* According to the mx27 Datasheet the reset procedure should take up to about
- * 1350us. We set the timeout to 500*100us = 50ms for sure */
-#define MXC_W1_RESET_TIMEOUT 500
-
/*
* MXC W1 Register offsets
*/
@@ -49,24 +46,25 @@ struct mxc_w1_device {
*/
static u8 mxc_w1_ds2_reset_bus(void *data)
{
- u8 reg_val;
- unsigned int timeout_cnt = 0;
struct mxc_w1_device *dev = data;
+ unsigned long timeout;
- writeb(MXC_W1_CONTROL_RPP, (dev->regs + MXC_W1_CONTROL));
+ writeb(MXC_W1_CONTROL_RPP, dev->regs + MXC_W1_CONTROL);
- while (1) {
- reg_val = readb(dev->regs + MXC_W1_CONTROL);
+ /* Wait for reset sequence 511+512us, use 1500us for sure */
+ timeout = jiffies + usecs_to_jiffies(1500);
- if (!(reg_val & MXC_W1_CONTROL_RPP) ||
- timeout_cnt > MXC_W1_RESET_TIMEOUT)
- break;
- else
- timeout_cnt++;
+ udelay(511 + 512);
- udelay(100);
- }
- return !(reg_val & MXC_W1_CONTROL_PST);
+ do {
+ u8 ctrl = readb(dev->regs + MXC_W1_CONTROL);
+
+ /* PST bit is valid after the RPP bit is self-cleared */
+ if (!(ctrl & MXC_W1_CONTROL_RPP))
+ return !(ctrl & MXC_W1_CONTROL_PST);
+ } while (time_is_after_jiffies(timeout));
+
+ return 1;
}
/*
--
1.8.3.2
^ permalink raw reply [flat|nested] 4+ messages in thread* [PATCH 3/4] w1: mxc_w1: Perform a software reset at startup
2014-05-08 7:56 [PATCH 1/4] w1: mxc_w1: Fix incorrect "presence" status Alexander Shiyan
2014-05-08 7:56 ` [PATCH 2/4] w1: mxc_w1: Optimize mxc_w1_ds2_reset_bus() Alexander Shiyan
@ 2014-05-08 7:56 ` Alexander Shiyan
2014-05-08 7:56 ` [PATCH 4/4] w1: mxc_w1: Optimize mxc_w1_ds2_touch_bit() Alexander Shiyan
2 siblings, 0 replies; 4+ messages in thread
From: Alexander Shiyan @ 2014-05-08 7:56 UTC (permalink / raw)
To: linux-kernel; +Cc: Evgeniy Polyakov, Sascha Hauer, Shawn Guo, Alexander Shiyan
This patch adds a software reset for 1-Wire module at driver startup.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
---
drivers/w1/masters/mxc_w1.c | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/drivers/w1/masters/mxc_w1.c b/drivers/w1/masters/mxc_w1.c
index 0d05abe..741d2bb4 100644
--- a/drivers/w1/masters/mxc_w1.c
+++ b/drivers/w1/masters/mxc_w1.c
@@ -32,6 +32,7 @@
# define MXC_W1_CONTROL_RPP BIT(7)
#define MXC_W1_TIME_DIVIDER 0x02
#define MXC_W1_RESET 0x04
+# define MXC_W1_RESET_RST BIT(0)
struct mxc_w1_device {
void __iomem *regs;
@@ -129,6 +130,10 @@ static int mxc_w1_probe(struct platform_device *pdev)
if (err)
return err;
+ /* Software reset 1-Wire module */
+ writeb(MXC_W1_RESET_RST, mdev->regs + MXC_W1_RESET);
+ writeb(0, mdev->regs + MXC_W1_RESET);
+
writeb(clkdiv - 1, mdev->regs + MXC_W1_TIME_DIVIDER);
mdev->bus_master.data = mdev;
--
1.8.3.2
^ permalink raw reply [flat|nested] 4+ messages in thread* [PATCH 4/4] w1: mxc_w1: Optimize mxc_w1_ds2_touch_bit()
2014-05-08 7:56 [PATCH 1/4] w1: mxc_w1: Fix incorrect "presence" status Alexander Shiyan
2014-05-08 7:56 ` [PATCH 2/4] w1: mxc_w1: Optimize mxc_w1_ds2_reset_bus() Alexander Shiyan
2014-05-08 7:56 ` [PATCH 3/4] w1: mxc_w1: Perform a software reset at startup Alexander Shiyan
@ 2014-05-08 7:56 ` Alexander Shiyan
2 siblings, 0 replies; 4+ messages in thread
From: Alexander Shiyan @ 2014-05-08 7:56 UTC (permalink / raw)
To: linux-kernel; +Cc: Evgeniy Polyakov, Sascha Hauer, Shawn Guo, Alexander Shiyan
According to the i.MX reference manual, the read/write bit operations
takes from 60 us to 120 us.
This patch optimizes mxc_w1_ds2_touch_bit() function to use proper
value for such delay. Nevertheless, a small margin for the timeout has
been added for the case if clock frequency is inaccurate.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
---
drivers/w1/masters/mxc_w1.c | 27 +++++++++++++++------------
1 file changed, 15 insertions(+), 12 deletions(-)
diff --git a/drivers/w1/masters/mxc_w1.c b/drivers/w1/masters/mxc_w1.c
index 741d2bb4..da3d0f0 100644
--- a/drivers/w1/masters/mxc_w1.c
+++ b/drivers/w1/masters/mxc_w1.c
@@ -75,22 +75,25 @@ static u8 mxc_w1_ds2_reset_bus(void *data)
*/
static u8 mxc_w1_ds2_touch_bit(void *data, u8 bit)
{
- struct mxc_w1_device *mdev = data;
- void __iomem *ctrl_addr = mdev->regs + MXC_W1_CONTROL;
- unsigned int timeout_cnt = 400; /* Takes max. 120us according to
- * datasheet.
- */
+ struct mxc_w1_device *dev = data;
+ unsigned long timeout;
+
+ writeb(MXC_W1_CONTROL_WR(bit), dev->regs + MXC_W1_CONTROL);
+
+ /* Wait for read/write bit (60us, Max 120us), use 200us for sure */
+ timeout = jiffies + usecs_to_jiffies(200);
- writeb(MXC_W1_CONTROL_WR(bit), ctrl_addr);
+ udelay(60);
- while (timeout_cnt--) {
- if (!(readb(ctrl_addr) & MXC_W1_CONTROL_WR(bit)))
- break;
+ do {
+ u8 ctrl = readb(dev->regs + MXC_W1_CONTROL);
- udelay(1);
- }
+ /* RDST bit is valid after the WR1/RD bit is self-cleared */
+ if (!(ctrl & MXC_W1_CONTROL_WR(bit)))
+ return !!(ctrl & MXC_W1_CONTROL_RDST);
+ } while (time_is_after_jiffies(timeout));
- return !!(readb(ctrl_addr) & MXC_W1_CONTROL_RDST);
+ return 0;
}
static int mxc_w1_probe(struct platform_device *pdev)
--
1.8.3.2
^ permalink raw reply [flat|nested] 4+ messages in thread