From: Alexandre Courbot <acourbot@nvidia.com>
To: David Airlie <airlied@linux.ie>, Ben Skeggs <bskeggs@redhat.com>,
Lucas Stach <dev@lynxeye.de>,
Thierry Reding <thierry.reding@gmail.com>
Cc: <nouveau@lists.freedesktop.org>,
<dri-devel@lists.freedesktop.org>, <linux-tegra@vger.kernel.org>,
<linux-kernel@vger.kernel.org>, <gnurou@gmail.com>,
Alexandre Courbot <acourbot@nvidia.com>
Subject: [PATCH 3/4] drm/nouveau: hook up cache sync functions
Date: Mon, 19 May 2014 16:10:57 +0900 [thread overview]
Message-ID: <1400483458-9648-4-git-send-email-acourbot@nvidia.com> (raw)
In-Reply-To: <1400483458-9648-1-git-send-email-acourbot@nvidia.com>
From: Lucas Stach <dev@lynxeye.de>
Signed-off-by: Lucas Stach <dev@lynxeye.de>
[acourbot@nvidia.com: make conditional and platform-friendly]
Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
---
drivers/gpu/drm/nouveau/nouveau_bo.c | 32 ++++++++++++++++++++++++++++++++
drivers/gpu/drm/nouveau/nouveau_bo.h | 20 ++++++++++++++++++++
drivers/gpu/drm/nouveau/nouveau_gem.c | 8 +++++++-
3 files changed, 59 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/nouveau/nouveau_bo.c b/drivers/gpu/drm/nouveau/nouveau_bo.c
index b6dc85c614be..0886f47e5244 100644
--- a/drivers/gpu/drm/nouveau/nouveau_bo.c
+++ b/drivers/gpu/drm/nouveau/nouveau_bo.c
@@ -407,6 +407,8 @@ nouveau_bo_validate(struct nouveau_bo *nvbo, bool interruptible,
{
int ret;
+ nouveau_bo_sync_for_device(nvbo);
+
ret = ttm_bo_validate(&nvbo->bo, &nvbo->placement,
interruptible, no_wait_gpu);
if (ret)
@@ -487,6 +489,36 @@ nouveau_bo_invalidate_caches(struct ttm_bo_device *bdev, uint32_t flags)
return 0;
}
+#ifdef NOUVEAU_NEED_CACHE_SYNC
+void
+nouveau_bo_sync_for_cpu(struct nouveau_bo *nvbo)
+{
+ struct nouveau_device *device;
+ struct ttm_tt *ttm = nvbo->bo.ttm;
+
+ device = nouveau_dev(nouveau_bdev(ttm->bdev)->dev);
+
+ if (nvbo->bo.ttm && nvbo->bo.ttm->caching_state == tt_cached)
+ ttm_dma_tt_cache_sync_for_cpu((struct ttm_dma_tt *)nvbo->bo.ttm,
+ nv_device_base(device));
+}
+
+void
+nouveau_bo_sync_for_device(struct nouveau_bo *nvbo)
+{
+ struct ttm_tt *ttm = nvbo->bo.ttm;
+
+ if (ttm && ttm->caching_state == tt_cached) {
+ struct nouveau_device *device;
+
+ device = nouveau_dev(nouveau_bdev(ttm->bdev)->dev);
+
+ ttm_dma_tt_cache_sync_for_device((struct ttm_dma_tt *)ttm,
+ nv_device_base(device));
+ }
+}
+#endif
+
static int
nouveau_bo_init_mem_type(struct ttm_bo_device *bdev, uint32_t type,
struct ttm_mem_type_manager *man)
diff --git a/drivers/gpu/drm/nouveau/nouveau_bo.h b/drivers/gpu/drm/nouveau/nouveau_bo.h
index ff17c1f432fc..ead214931223 100644
--- a/drivers/gpu/drm/nouveau/nouveau_bo.h
+++ b/drivers/gpu/drm/nouveau/nouveau_bo.h
@@ -89,6 +89,26 @@ int nouveau_bo_vma_add(struct nouveau_bo *, struct nouveau_vm *,
struct nouveau_vma *);
void nouveau_bo_vma_del(struct nouveau_bo *, struct nouveau_vma *);
+#if IS_ENABLED(CONFIG_ARCH_TEGRA)
+#define NOUVEAU_NEED_CACHE_SYNC
+#endif
+
+#ifdef NOUVEAU_NEED_CACHE_SYNC
+void nouveau_bo_sync_for_cpu(struct nouveau_bo *);
+void nouveau_bo_sync_for_device(struct nouveau_bo *);
+#else
+static inline void
+nouveau_bo_sync_for_cpu(struct nouveau_bo *)
+{
+}
+
+static inline void
+nouveau_bo_sync_for_device(struct nouveau_bo *)
+{
+}
+#endif
+
+
/* TODO: submit equivalent to TTM generic API upstream? */
static inline void __iomem *
nvbo_kmap_obj_iovirtual(struct nouveau_bo *nvbo)
diff --git a/drivers/gpu/drm/nouveau/nouveau_gem.c b/drivers/gpu/drm/nouveau/nouveau_gem.c
index c90c0dc0afe8..b7e42fdc9634 100644
--- a/drivers/gpu/drm/nouveau/nouveau_gem.c
+++ b/drivers/gpu/drm/nouveau/nouveau_gem.c
@@ -897,7 +897,13 @@ nouveau_gem_ioctl_cpu_prep(struct drm_device *dev, void *data,
ret = ttm_bo_wait(&nvbo->bo, true, true, no_wait);
spin_unlock(&nvbo->bo.bdev->fence_lock);
drm_gem_object_unreference_unlocked(gem);
- return ret;
+
+ if (ret)
+ return ret;
+
+ nouveau_bo_sync_for_cpu(nvbo);
+
+ return 0;
}
int
--
1.9.2
next prev parent reply other threads:[~2014-05-19 7:11 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-05-19 7:10 [PATCH 0/4] drm/ttm: nouveau: memory coherency fixes for ARM Alexandre Courbot
2014-05-19 7:10 ` [PATCH 1/4] drm/ttm: recognize ARM arch in ioprot handler Alexandre Courbot
2014-05-19 7:10 ` [PATCH 2/4] drm/ttm: introduce dma cache sync helpers Alexandre Courbot
2014-05-19 8:33 ` Thierry Reding
2014-05-23 5:49 ` Alexandre Courbot
2014-05-23 7:31 ` Thierry Reding
2014-05-19 7:10 ` Alexandre Courbot [this message]
2014-05-19 8:46 ` [PATCH 3/4] drm/nouveau: hook up cache sync functions Thierry Reding
2014-05-19 9:44 ` Lucas Stach
2014-05-23 6:00 ` Alexandre Courbot
2014-05-19 9:31 ` Lucas Stach
2014-05-23 6:01 ` Alexandre Courbot
2014-05-19 7:10 ` [PATCH 4/4] drm/nouveau: introduce CPU cache flushing macro Alexandre Courbot
2014-05-19 9:02 ` Thierry Reding
2014-05-19 9:22 ` Lucas Stach
2014-05-19 10:03 ` Thierry Reding
2014-05-19 10:27 ` [Nouveau] " Daniel Vetter
2014-05-23 6:58 ` Alexandre Courbot
2014-06-09 10:41 ` Alexandre Courbot
2014-06-12 13:50 ` Alexandre Courbot
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