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From: Nadav Amit <namit@cs.technion.ac.il>
To: pbonzini@redhat.com
Cc: gleb@kernel.org, tglx@linutronix.de, mingo@redhat.com,
	hpa@zytor.com, x86@kernel.org, linux-kernel@vger.kernel.org,
	kvm@vger.kernel.org, Nadav Amit <namit@cs.technion.ac.il>
Subject: [PATCH v2 9/9] KVM: vmx: vmx instructions handling does not consider cs.l
Date: Wed, 18 Jun 2014 17:19:26 +0300	[thread overview]
Message-ID: <1403101166-23616-10-git-send-email-namit@cs.technion.ac.il> (raw)
In-Reply-To: <1403101166-23616-1-git-send-email-namit@cs.technion.ac.il>

VMX instructions use 32-bit operands in 32-bit mode, and 64-bit operands in
64-bit mode.  The current implementation is broken since it does not use the
register operands correctly, and always uses 64-bit for reads and writes.
Moreover, write to memory in vmwrite only considers long-mode, so it ignores
cs.l. This patch fixes this behavior.  The field of vmread/vmwrite is kept
intentionally as 64-bit read since if bits [63:32] are not cleared the
instruction should fail, according to Intel SDM.

Signed-off-by: Nadav Amit <namit@cs.technion.ac.il>
---
 arch/x86/kvm/vmx.c | 8 ++++----
 arch/x86/kvm/x86.h | 9 +++++++++
 2 files changed, 13 insertions(+), 4 deletions(-)

diff --git a/arch/x86/kvm/vmx.c b/arch/x86/kvm/vmx.c
index cbfbb8b..75dc888 100644
--- a/arch/x86/kvm/vmx.c
+++ b/arch/x86/kvm/vmx.c
@@ -6397,7 +6397,7 @@ static int handle_vmread(struct kvm_vcpu *vcpu)
 	 * on the guest's mode (32 or 64 bit), not on the given field's length.
 	 */
 	if (vmx_instruction_info & (1u << 10)) {
-		kvm_register_write(vcpu, (((vmx_instruction_info) >> 3) & 0xf),
+		kvm_register_writel(vcpu, (((vmx_instruction_info) >> 3) & 0xf),
 			field_value);
 	} else {
 		if (get_vmx_mem_address(vcpu, exit_qualification,
@@ -6434,14 +6434,14 @@ static int handle_vmwrite(struct kvm_vcpu *vcpu)
 		return 1;
 
 	if (vmx_instruction_info & (1u << 10))
-		field_value = kvm_register_read(vcpu,
+		field_value = kvm_register_readl(vcpu,
 			(((vmx_instruction_info) >> 3) & 0xf));
 	else {
 		if (get_vmx_mem_address(vcpu, exit_qualification,
 				vmx_instruction_info, &gva))
 			return 1;
 		if (kvm_read_guest_virt(&vcpu->arch.emulate_ctxt, gva,
-			   &field_value, (is_long_mode(vcpu) ? 8 : 4), &e)) {
+			   &field_value, (is_64_bit_mode(vcpu) ? 8 : 4), &e)) {
 			kvm_inject_page_fault(vcpu, &e);
 			return 1;
 		}
@@ -6571,7 +6571,7 @@ static int handle_invept(struct kvm_vcpu *vcpu)
 	}
 
 	vmx_instruction_info = vmcs_read32(VMX_INSTRUCTION_INFO);
-	type = kvm_register_read(vcpu, (vmx_instruction_info >> 28) & 0xf);
+	type = kvm_register_readl(vcpu, (vmx_instruction_info >> 28) & 0xf);
 
 	types = (nested_vmx_ept_caps >> VMX_EPT_EXTENT_SHIFT) & 6;
 
diff --git a/arch/x86/kvm/x86.h b/arch/x86/kvm/x86.h
index c5b61a7..306a1b7 100644
--- a/arch/x86/kvm/x86.h
+++ b/arch/x86/kvm/x86.h
@@ -126,6 +126,15 @@ static inline unsigned long kvm_register_readl(struct kvm_vcpu *vcpu,
 	return is_64_bit_mode(vcpu) ? val : (u32)val;
 }
 
+static inline void kvm_register_writel(struct kvm_vcpu *vcpu,
+				       enum kvm_reg reg,
+				       unsigned long val)
+{
+	if (!is_64_bit_mode(vcpu))
+		val = (u32)val;
+	return kvm_register_write(vcpu, reg, val);
+}
+
 void kvm_before_handle_nmi(struct kvm_vcpu *vcpu);
 void kvm_after_handle_nmi(struct kvm_vcpu *vcpu);
 int kvm_inject_realmode_interrupt(struct kvm_vcpu *vcpu, int irq, int inc_eip);
-- 
1.9.1


  parent reply	other threads:[~2014-06-18 14:19 UTC|newest]

Thread overview: 34+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-06-15 13:12 [PATCH 0/6] KVM: x86: More emulator bugs Nadav Amit
2014-06-15 13:12 ` [PATCH 1/6] KVM: x86: bit-ops emulation ignores offset on 64-bit Nadav Amit
2014-06-15 13:12 ` [PATCH 2/6] KVM: x86: Wrong emulation on 'xadd X, X' Nadav Amit
2014-06-16 17:38   ` Bandan Das
2014-06-17  5:16     ` Paolo Bonzini
2014-06-17 15:35       ` Bandan Das
2014-06-17 16:49         ` Paolo Bonzini
2014-06-15 13:12 ` [PATCH 3/6] KVM: x86: Inter privilage level ret emulation is not implemeneted Nadav Amit
2014-06-15 13:13 ` [PATCH 4/6] KVM: x86: emulation of dword cmov on long-mode should clear [63:32] Nadav Amit
2014-06-15 13:13 ` [PATCH 5/6] KVM: x86: NOP emulation clears (incorrectly) the high 32-bits of RAX Nadav Amit
2014-06-15 13:13 ` [PATCH 6/6] KVM: x86: check DR6/7 high-bits are clear only on long-mode Nadav Amit
2014-06-16 10:17   ` Paolo Bonzini
2014-06-16 10:33     ` Nadav Amit
2014-06-16 11:09       ` Paolo Bonzini
2014-06-16 11:53         ` Nadav Amit
2014-06-16 14:56           ` Paolo Bonzini
2014-06-16 17:07             ` Nadav Amit
2014-06-18 14:19             ` [PATCH v2 0/9] KVM: x86: More emulator bugs Nadav Amit
2014-06-18 14:19               ` [PATCH v2 1/9] KVM: x86: bit-ops emulation ignores offset on 64-bit Nadav Amit
2014-06-18 14:19               ` [PATCH v2 2/9] KVM: x86: Wrong emulation on 'xadd X, X' Nadav Amit
2014-06-18 14:19               ` [PATCH v2 3/9] KVM: x86: Inter privilage level ret emulation is not implemeneted Nadav Amit
2014-06-18 14:19               ` [PATCH v2 4/9] KVM: x86: emulation of dword cmov on long-mode should clear [63:32] Nadav Amit
2014-06-18 14:19               ` [PATCH v2 5/9] KVM: x86: NOP emulation clears (incorrectly) the high 32-bits of RAX Nadav Amit
2014-06-18 14:19               ` [PATCH v2 6/9] KVM: x86: check DR6/7 high-bits are clear only on long-mode Nadav Amit
2014-06-18 14:19               ` [PATCH v2 7/9] KVM: x86: Hypercall handling does not considers opsize correctly Nadav Amit
2014-06-18 14:19               ` [PATCH v2 8/9] KVM: vmx: handle_cr ignores 32/64-bit mode Nadav Amit
2014-06-18 14:19               ` Nadav Amit [this message]
2014-06-18 15:41                 ` [PATCH v2 9/9] KVM: vmx: vmx instructions handling does not consider cs.l Paolo Bonzini
2014-06-18 16:01                   ` Nadav Amit
2014-06-18 16:06                     ` Paolo Bonzini
2014-06-18 17:51                       ` Nadav Amit
2014-06-19  9:45                         ` Paolo Bonzini
2014-06-18 15:45               ` [PATCH v2 0/9] KVM: x86: More emulator bugs Paolo Bonzini
2014-06-16 10:18 ` [PATCH 0/6] " Paolo Bonzini

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