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From: Tomasz Figa <t.figa@samsung.com>
To: linux-samsung-soc@vger.kernel.org
Cc: linux-kernel@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org,
	Kukjin Kim <kgene.kim@samsung.com>,
	Russell King - ARM Linux <linux@arm.linux.org.uk>,
	lauraa@codeaurora.org, linux-omap@vger.kernel.org,
	linus.walleij@linaro.org, santosh.shilimkar@ti.com,
	tony@atomide.com, drake@endlessm.com,
	Marek Szyprowski <m.szyprowski@samsung.com>,
	Tomasz Figa <tomasz.figa@gmail.com>,
	loeliger@gmail.com, Tomasz Figa <t.figa@samsung.com>
Subject: [PATCH v3 2/7] ARM: l2c: Add interface to ask hypervisor to configure L2C
Date: Thu, 17 Jul 2014 18:38:57 +0200	[thread overview]
Message-ID: <1405615142-21426-3-git-send-email-t.figa@samsung.com> (raw)
In-Reply-To: <1405615142-21426-1-git-send-email-t.figa@samsung.com>

Because certain secure hypervisor do not allow writes to individual L2C
registers, but rather expect set of parameters to be passed as argument
to secure monitor calls, there is a need to provide an interface for the
L2C driver to ask the firmware to configure the hardware according to
specified parameters. This patch adds such.

Signed-off-by: Tomasz Figa <t.figa@samsung.com>
---
 arch/arm/include/asm/outercache.h | 3 +++
 arch/arm/mm/cache-l2x0.c          | 5 +++++
 2 files changed, 8 insertions(+)

diff --git a/arch/arm/include/asm/outercache.h b/arch/arm/include/asm/outercache.h
index 891a56b..563b92f 100644
--- a/arch/arm/include/asm/outercache.h
+++ b/arch/arm/include/asm/outercache.h
@@ -23,6 +23,8 @@
 
 #include <linux/types.h>
 
+struct l2x0_regs;
+
 struct outer_cache_fns {
 	void (*inv_range)(unsigned long, unsigned long);
 	void (*clean_range)(unsigned long, unsigned long);
@@ -36,6 +38,7 @@ struct outer_cache_fns {
 
 	/* This is an ARM L2C thing */
 	void (*write_sec)(unsigned long, unsigned);
+	void (*configure)(const struct l2x0_regs *);
 };
 
 extern struct outer_cache_fns outer_cache;
diff --git a/arch/arm/mm/cache-l2x0.c b/arch/arm/mm/cache-l2x0.c
index 385c047..21a625a0 100644
--- a/arch/arm/mm/cache-l2x0.c
+++ b/arch/arm/mm/cache-l2x0.c
@@ -109,6 +109,11 @@ static inline void l2c_unlock(void __iomem *base, unsigned num)
 
 static void l2c_configure(void __iomem *base)
 {
+	if (outer_cache.configure) {
+		outer_cache.configure(&l2x0_saved_regs);
+		return;
+	}
+
 	if (l2x0_data->configure)
 		l2x0_data->configure(base);
 
-- 
1.9.3


  parent reply	other threads:[~2014-07-17 16:41 UTC|newest]

Thread overview: 11+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-07-17 16:38 [PATCH v3 0/7] Enable L2 cache support on Exynos4210/4x12 SoCs Tomasz Figa
2014-07-17 16:38 ` [PATCH v3 1/7] ARM: l2c: Refactor the driver to use commit-like interface Tomasz Figa
2014-08-02 22:09   ` Russell King - ARM Linux
2014-08-02 22:16     ` Tomasz Figa
2014-07-17 16:38 ` Tomasz Figa [this message]
2014-07-17 16:38 ` [PATCH v3 3/7] ARM: l2c: Get outer cache .write_sec callback from mach_desc only if not NULL Tomasz Figa
2014-07-17 16:38 ` [PATCH v3 4/7] ARM: l2c: Add support for overriding prefetch settings Tomasz Figa
2014-07-17 16:39 ` [PATCH v3 5/7] ARM: EXYNOS: Add .write_sec outer cache callback for L2C-310 Tomasz Figa
2014-07-17 16:39 ` [PATCH v3 6/7] ARM: EXYNOS: Add support for non-secure L2X0 resume Tomasz Figa
2014-07-17 16:39 ` [PATCH v3 7/7] ARM: dts: exynos4: Add nodes for L2 cache controller Tomasz Figa
2014-07-31 19:08 ` [PATCH v3 0/7] Enable L2 cache support on Exynos4210/4x12 SoCs Tomasz Figa

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