* [PATCH 2/9] staging: rtl8188eu: Rework function rtl8188e_PHY_RF6052SetCckTxPower()
2014-08-31 8:38 [PATCH 1/9] staging: rtl8188eu: Rework function rtl8188e_PHY_RF6052SetBandwidth() navin patidar
@ 2014-08-31 8:38 ` navin patidar
2014-08-31 8:38 ` [PATCH 3/9] staging: rtl8188eu: Rework function getpowerbase88e() navin patidar
` (6 subsequent siblings)
7 siblings, 0 replies; 9+ messages in thread
From: navin patidar @ 2014-08-31 8:38 UTC (permalink / raw)
To: gregkh; +Cc: Larry.Finger, devel, linux-kernel, navin patidar
Rename CamelCase variables and function name.
Remove redundant variable TurboScanOff.
Signed-off-by: navin patidar <navin.patidar@gmail.com>
---
drivers/staging/rtl8188eu/hal/phy.c | 2 +-
drivers/staging/rtl8188eu/hal/rtl8188e_rf6052.c | 124 ++++++++---------------
drivers/staging/rtl8188eu/include/rf.h | 2 +
drivers/staging/rtl8188eu/include/rtl8188e_rf.h | 1 -
4 files changed, 48 insertions(+), 81 deletions(-)
diff --git a/drivers/staging/rtl8188eu/hal/phy.c b/drivers/staging/rtl8188eu/hal/phy.c
index b67b91e..a918dfa 100644
--- a/drivers/staging/rtl8188eu/hal/phy.c
+++ b/drivers/staging/rtl8188eu/hal/phy.c
@@ -237,7 +237,7 @@ void phy_set_tx_power_level(struct adapter *adapt, u8 channel)
phy_power_index_check(adapt, channel, &cck_pwr[0], &ofdm_pwr[0],
&bw20_pwr[0], &bw40_pwr[0]);
- rtl8188e_PHY_RF6052SetCckTxPower(adapt, &cck_pwr[0]);
+ rtl88eu_phy_rf6052_set_cck_txpower(adapt, &cck_pwr[0]);
rtl8188e_PHY_RF6052SetOFDMTxPower(adapt, &ofdm_pwr[0], &bw20_pwr[0],
&bw40_pwr[0], channel);
}
diff --git a/drivers/staging/rtl8188eu/hal/rtl8188e_rf6052.c b/drivers/staging/rtl8188eu/hal/rtl8188e_rf6052.c
index bd90068..8959ac3 100644
--- a/drivers/staging/rtl8188eu/hal/rtl8188e_rf6052.c
+++ b/drivers/staging/rtl8188eu/hal/rtl8188e_rf6052.c
@@ -45,119 +45,85 @@ void rtl88eu_phy_rf6052_set_bandwidth(struct adapter *adapt,
}
}
-/*-----------------------------------------------------------------------------
- * Function: PHY_RF6052SetCckTxPower
- *
- * Overview:
- *
- * Input: NONE
- *
- * Output: NONE
- *
- * Return: NONE
- *
- * Revised History:
- * When Who Remark
- * 11/05/2008 MHC Simulate 8192series..
- *
- *---------------------------------------------------------------------------*/
-
-void
-rtl8188e_PHY_RF6052SetCckTxPower(
- struct adapter *Adapter,
- u8 *pPowerlevel)
+void rtl88eu_phy_rf6052_set_cck_txpower(struct adapter *adapt, u8 *powerlevel)
{
- struct hal_data_8188e *pHalData = GET_HAL_DATA(Adapter);
- struct dm_priv *pdmpriv = &pHalData->dmpriv;
- struct mlme_ext_priv *pmlmeext = &Adapter->mlmeextpriv;
- u32 TxAGC[2] = {0, 0}, tmpval = 0, pwrtrac_value;
- bool TurboScanOff = false;
+ struct hal_data_8188e *hal_data = GET_HAL_DATA(adapt);
+ struct dm_priv *pdmpriv = &hal_data->dmpriv;
+ struct mlme_ext_priv *pmlmeext = &adapt->mlmeextpriv;
+ u32 tx_agc[2] = {0, 0}, tmpval = 0, pwrtrac_value;
u8 idx1, idx2;
u8 *ptr;
u8 direction;
- /* FOR CE ,must disable turbo scan */
- TurboScanOff = true;
if (pmlmeext->sitesurvey_res.state == SCAN_PROCESS) {
- TxAGC[RF_PATH_A] = 0x3f3f3f3f;
- TxAGC[RF_PATH_B] = 0x3f3f3f3f;
-
- TurboScanOff = true;/* disable turbo scan */
-
- if (TurboScanOff) {
- for (idx1 = RF_PATH_A; idx1 <= RF_PATH_B; idx1++) {
- TxAGC[idx1] =
- pPowerlevel[idx1] | (pPowerlevel[idx1]<<8) |
- (pPowerlevel[idx1]<<16) | (pPowerlevel[idx1]<<24);
- /* 2010/10/18 MH For external PA module. We need to limit power index to be less than 0x20. */
- if (TxAGC[idx1] > 0x20 && pHalData->ExternalPA)
- TxAGC[idx1] = 0x20;
- }
+ tx_agc[RF_PATH_A] = 0x3f3f3f3f;
+ tx_agc[RF_PATH_B] = 0x3f3f3f3f;
+ for (idx1 = RF_PATH_A; idx1 <= RF_PATH_B; idx1++) {
+ tx_agc[idx1] = powerlevel[idx1] |
+ (powerlevel[idx1]<<8) |
+ (powerlevel[idx1]<<16) |
+ (powerlevel[idx1]<<24);
+ if (tx_agc[idx1] > 0x20 && hal_data->ExternalPA)
+ tx_agc[idx1] = 0x20;
}
} else {
- /* Driver dynamic Tx power shall not affect Tx power.
- * It shall be determined by power training mechanism.
-i * Currently, we cannot fully disable driver dynamic
- * tx power mechanism because it is referenced by BT
- * coexist mechanism.
- * In the future, two mechanism shall be separated from
- * each other and maintained independently. */
if (pdmpriv->DynamicTxHighPowerLvl == TxHighPwrLevel_Level1) {
- TxAGC[RF_PATH_A] = 0x10101010;
- TxAGC[RF_PATH_B] = 0x10101010;
+ tx_agc[RF_PATH_A] = 0x10101010;
+ tx_agc[RF_PATH_B] = 0x10101010;
} else if (pdmpriv->DynamicTxHighPowerLvl == TxHighPwrLevel_Level2) {
- TxAGC[RF_PATH_A] = 0x00000000;
- TxAGC[RF_PATH_B] = 0x00000000;
+ tx_agc[RF_PATH_A] = 0x00000000;
+ tx_agc[RF_PATH_B] = 0x00000000;
} else {
for (idx1 = RF_PATH_A; idx1 <= RF_PATH_B; idx1++) {
- TxAGC[idx1] =
- pPowerlevel[idx1] | (pPowerlevel[idx1]<<8) |
- (pPowerlevel[idx1]<<16) | (pPowerlevel[idx1]<<24);
+ tx_agc[idx1] = powerlevel[idx1] |
+ (powerlevel[idx1]<<8) |
+ (powerlevel[idx1]<<16) |
+ (powerlevel[idx1]<<24);
}
- if (pHalData->EEPROMRegulatory == 0) {
- tmpval = (pHalData->MCSTxPowerLevelOriginalOffset[0][6]) +
- (pHalData->MCSTxPowerLevelOriginalOffset[0][7]<<8);
- TxAGC[RF_PATH_A] += tmpval;
-
- tmpval = (pHalData->MCSTxPowerLevelOriginalOffset[0][14]) +
- (pHalData->MCSTxPowerLevelOriginalOffset[0][15]<<24);
- TxAGC[RF_PATH_B] += tmpval;
+ if (hal_data->EEPROMRegulatory == 0) {
+ tmpval = hal_data->MCSTxPowerLevelOriginalOffset[0][6] +
+ (hal_data->MCSTxPowerLevelOriginalOffset[0][7]<<8);
+ tx_agc[RF_PATH_A] += tmpval;
+
+ tmpval = hal_data->MCSTxPowerLevelOriginalOffset[0][14] +
+ (hal_data->MCSTxPowerLevelOriginalOffset[0][15]<<24);
+ tx_agc[RF_PATH_B] += tmpval;
}
}
}
for (idx1 = RF_PATH_A; idx1 <= RF_PATH_B; idx1++) {
- ptr = (u8 *)(&(TxAGC[idx1]));
+ ptr = (u8 *)(&(tx_agc[idx1]));
for (idx2 = 0; idx2 < 4; idx2++) {
if (*ptr > RF6052_MAX_TX_PWR)
*ptr = RF6052_MAX_TX_PWR;
ptr++;
}
}
- ODM_TxPwrTrackAdjust88E(&pHalData->odmpriv, 1, &direction, &pwrtrac_value);
+ ODM_TxPwrTrackAdjust88E(&hal_data->odmpriv, 1, &direction, &pwrtrac_value);
if (direction == 1) {
/* Increase TX power */
- TxAGC[0] += pwrtrac_value;
- TxAGC[1] += pwrtrac_value;
+ tx_agc[0] += pwrtrac_value;
+ tx_agc[1] += pwrtrac_value;
} else if (direction == 2) {
/* Decrease TX power */
- TxAGC[0] -= pwrtrac_value;
- TxAGC[1] -= pwrtrac_value;
+ tx_agc[0] -= pwrtrac_value;
+ tx_agc[1] -= pwrtrac_value;
}
/* rf-A cck tx power */
- tmpval = TxAGC[RF_PATH_A]&0xff;
- phy_set_bb_reg(Adapter, rTxAGC_A_CCK1_Mcs32, bMaskByte1, tmpval);
- tmpval = TxAGC[RF_PATH_A]>>8;
- phy_set_bb_reg(Adapter, rTxAGC_B_CCK11_A_CCK2_11, 0xffffff00, tmpval);
+ tmpval = tx_agc[RF_PATH_A]&0xff;
+ phy_set_bb_reg(adapt, rTxAGC_A_CCK1_Mcs32, bMaskByte1, tmpval);
+ tmpval = tx_agc[RF_PATH_A]>>8;
+ phy_set_bb_reg(adapt, rTxAGC_B_CCK11_A_CCK2_11, 0xffffff00, tmpval);
/* rf-B cck tx power */
- tmpval = TxAGC[RF_PATH_B]>>24;
- phy_set_bb_reg(Adapter, rTxAGC_B_CCK11_A_CCK2_11, bMaskByte0, tmpval);
- tmpval = TxAGC[RF_PATH_B]&0x00ffffff;
- phy_set_bb_reg(Adapter, rTxAGC_B_CCK1_55_Mcs32, 0xffffff00, tmpval);
-} /* PHY_RF6052SetCckTxPower */
+ tmpval = tx_agc[RF_PATH_B]>>24;
+ phy_set_bb_reg(adapt, rTxAGC_B_CCK11_A_CCK2_11, bMaskByte0, tmpval);
+ tmpval = tx_agc[RF_PATH_B]&0x00ffffff;
+ phy_set_bb_reg(adapt, rTxAGC_B_CCK1_55_Mcs32, 0xffffff00, tmpval);
+}
/* */
/* powerbase0 for OFDM rates */
diff --git a/drivers/staging/rtl8188eu/include/rf.h b/drivers/staging/rtl8188eu/include/rf.h
index ca0d28d..82bd076 100644
--- a/drivers/staging/rtl8188eu/include/rf.h
+++ b/drivers/staging/rtl8188eu/include/rf.h
@@ -1,2 +1,4 @@
void rtl88eu_phy_rf6052_set_bandwidth(struct adapter *adapt,
enum ht_channel_width bandwidth);
+void rtl88eu_phy_rf6052_set_cck_txpower(struct adapter *adapt,
+ u8 *powerlevel);
diff --git a/drivers/staging/rtl8188eu/include/rtl8188e_rf.h b/drivers/staging/rtl8188eu/include/rtl8188e_rf.h
index 20b5ba0..22a70d0 100644
--- a/drivers/staging/rtl8188eu/include/rtl8188e_rf.h
+++ b/drivers/staging/rtl8188eu/include/rtl8188e_rf.h
@@ -28,7 +28,6 @@
void rtl8188e_RF_ChangeTxPath(struct adapter *Adapter, u16 DataRate);
void rtl8188e_PHY_RF6052SetBandwidth(struct adapter *Adapter,
enum ht_channel_width Bandwidth);
-void rtl8188e_PHY_RF6052SetCckTxPower(struct adapter *Adapter, u8 *level);
void rtl8188e_PHY_RF6052SetOFDMTxPower(struct adapter *Adapter, u8 *ofdm,
u8 *pwrbw20, u8 *pwrbw40, u8 channel);
--
1.7.10.4
^ permalink raw reply [flat|nested] 9+ messages in thread* [PATCH 3/9] staging: rtl8188eu: Rework function getpowerbase88e()
2014-08-31 8:38 [PATCH 1/9] staging: rtl8188eu: Rework function rtl8188e_PHY_RF6052SetBandwidth() navin patidar
2014-08-31 8:38 ` [PATCH 2/9] staging: rtl8188eu: Rework function rtl8188e_PHY_RF6052SetCckTxPower() navin patidar
@ 2014-08-31 8:38 ` navin patidar
2014-08-31 8:38 ` [PATCH 4/9] staging: rtl8188eu: Rework function rtl8188e_PHY_RF6052SetOFDMTxPower() navin patidar
` (5 subsequent siblings)
7 siblings, 0 replies; 9+ messages in thread
From: navin patidar @ 2014-08-31 8:38 UTC (permalink / raw)
To: gregkh; +Cc: Larry.Finger, devel, linux-kernel, navin patidar
Rename CamelCase variables.
Signed-off-by: navin patidar <navin.patidar@gmail.com>
---
drivers/staging/rtl8188eu/hal/rtl8188e_rf6052.c | 33 ++++++++++++-----------
1 file changed, 17 insertions(+), 16 deletions(-)
diff --git a/drivers/staging/rtl8188eu/hal/rtl8188e_rf6052.c b/drivers/staging/rtl8188eu/hal/rtl8188e_rf6052.c
index 8959ac3..6a1731c 100644
--- a/drivers/staging/rtl8188eu/hal/rtl8188e_rf6052.c
+++ b/drivers/staging/rtl8188eu/hal/rtl8188e_rf6052.c
@@ -125,32 +125,33 @@ void rtl88eu_phy_rf6052_set_cck_txpower(struct adapter *adapt, u8 *powerlevel)
phy_set_bb_reg(adapt, rTxAGC_B_CCK1_55_Mcs32, 0xffffff00, tmpval);
}
-/* */
/* powerbase0 for OFDM rates */
/* powerbase1 for HT MCS rates */
-/* */
-static void getpowerbase88e(struct adapter *Adapter, u8 *pPowerLevelOFDM,
- u8 *pPowerLevelBW20, u8 *pPowerLevelBW40, u8 Channel, u32 *OfdmBase, u32 *MCSBase)
+static void getpowerbase88e(struct adapter *adapt, u8 *pwr_level_ofdm,
+ u8 *pwr_level_bw20, u8 *pwr_level_bw40,
+ u8 channel,u32 *ofdmbase, u32 *mcs_base)
{
- struct hal_data_8188e *pHalData = GET_HAL_DATA(Adapter);
- u32 powerBase0, powerBase1;
+ struct hal_data_8188e *hal_data = GET_HAL_DATA(adapt);
+ u32 powerbase0, powerbase1;
u8 i, powerlevel[2];
for (i = 0; i < 2; i++) {
- powerBase0 = pPowerLevelOFDM[i];
+ powerbase0 = pwr_level_ofdm[i];
- powerBase0 = (powerBase0<<24) | (powerBase0<<16) | (powerBase0<<8) | powerBase0;
- *(OfdmBase+i) = powerBase0;
+ powerbase0 = (powerbase0<<24) | (powerbase0<<16) |
+ (powerbase0<<8) | powerbase0;
+ *(ofdmbase+i) = powerbase0;
}
- for (i = 0; i < pHalData->NumTotalRFPath; i++) {
+ for (i = 0; i < hal_data->NumTotalRFPath; i++) {
/* Check HT20 to HT40 diff */
- if (pHalData->CurrentChannelBW == HT_CHANNEL_WIDTH_20)
- powerlevel[i] = pPowerLevelBW20[i];
+ if (hal_data->CurrentChannelBW == HT_CHANNEL_WIDTH_20)
+ powerlevel[i] = pwr_level_bw20[i];
else
- powerlevel[i] = pPowerLevelBW40[i];
- powerBase1 = powerlevel[i];
- powerBase1 = (powerBase1<<24) | (powerBase1<<16) | (powerBase1<<8) | powerBase1;
- *(MCSBase+i) = powerBase1;
+ powerlevel[i] = pwr_level_bw40[i];
+ powerbase1 = powerlevel[i];
+ powerbase1 = (powerbase1<<24) | (powerbase1<<16) |
+ (powerbase1<<8) | powerbase1;
+ *(mcs_base+i) = powerbase1;
}
}
static void get_rx_power_val_by_reg(struct adapter *Adapter, u8 Channel,
--
1.7.10.4
^ permalink raw reply [flat|nested] 9+ messages in thread* [PATCH 4/9] staging: rtl8188eu: Rework function rtl8188e_PHY_RF6052SetOFDMTxPower()
2014-08-31 8:38 [PATCH 1/9] staging: rtl8188eu: Rework function rtl8188e_PHY_RF6052SetBandwidth() navin patidar
2014-08-31 8:38 ` [PATCH 2/9] staging: rtl8188eu: Rework function rtl8188e_PHY_RF6052SetCckTxPower() navin patidar
2014-08-31 8:38 ` [PATCH 3/9] staging: rtl8188eu: Rework function getpowerbase88e() navin patidar
@ 2014-08-31 8:38 ` navin patidar
2014-08-31 8:38 ` [PATCH 5/9] staging: rtl8188eu: Rework function writeOFDMPowerReg88E() navin patidar
` (4 subsequent siblings)
7 siblings, 0 replies; 9+ messages in thread
From: navin patidar @ 2014-08-31 8:38 UTC (permalink / raw)
To: gregkh; +Cc: Larry.Finger, devel, linux-kernel, navin patidar
Rename CamelCase variables and function name.
Signed-off-by: navin patidar <navin.patidar@gmail.com>
---
drivers/staging/rtl8188eu/hal/phy.c | 2 +-
drivers/staging/rtl8188eu/hal/rtl8188e_rf6052.c | 61 +++++++----------------
drivers/staging/rtl8188eu/include/rf.h | 4 ++
drivers/staging/rtl8188eu/include/rtl8188e_rf.h | 2 -
4 files changed, 22 insertions(+), 47 deletions(-)
diff --git a/drivers/staging/rtl8188eu/hal/phy.c b/drivers/staging/rtl8188eu/hal/phy.c
index a918dfa..7291b46 100644
--- a/drivers/staging/rtl8188eu/hal/phy.c
+++ b/drivers/staging/rtl8188eu/hal/phy.c
@@ -238,7 +238,7 @@ void phy_set_tx_power_level(struct adapter *adapt, u8 channel)
&bw20_pwr[0], &bw40_pwr[0]);
rtl88eu_phy_rf6052_set_cck_txpower(adapt, &cck_pwr[0]);
- rtl8188e_PHY_RF6052SetOFDMTxPower(adapt, &ofdm_pwr[0], &bw20_pwr[0],
+ rtl88eu_phy_rf6052_set_ofdm_txpower(adapt, &ofdm_pwr[0], &bw20_pwr[0],
&bw40_pwr[0], channel);
}
diff --git a/drivers/staging/rtl8188eu/hal/rtl8188e_rf6052.c b/drivers/staging/rtl8188eu/hal/rtl8188e_rf6052.c
index 6a1731c..d63529b 100644
--- a/drivers/staging/rtl8188eu/hal/rtl8188e_rf6052.c
+++ b/drivers/staging/rtl8188eu/hal/rtl8188e_rf6052.c
@@ -305,60 +305,33 @@ static void writeOFDMPowerReg88E(struct adapter *Adapter, u8 index, u32 *pValue)
}
}
-/*-----------------------------------------------------------------------------
- * Function: PHY_RF6052SetOFDMTxPower
- *
- * Overview: For legacy and HY OFDM, we must read EEPROM TX power index for
- * different channel and read original value in TX power register area from
- * 0xe00. We increase offset and original value to be correct tx pwr.
- *
- * Input: NONE
- *
- * Output: NONE
- *
- * Return: NONE
- *
- * Revised History:
- * When Who Remark
- * 11/05/2008 MHC Simulate 8192 series method.
- * 01/06/2009 MHC 1. Prevent Path B tx power overflow or underflow dure to
- * A/B pwr difference or legacy/HT pwr diff.
- * 2. We concern with path B legacy/HT OFDM difference.
- * 01/22/2009 MHC Support new EPRO format from SD3.
- *
- *---------------------------------------------------------------------------*/
-
-void
-rtl8188e_PHY_RF6052SetOFDMTxPower(
- struct adapter *Adapter,
- u8 *pPowerLevelOFDM,
- u8 *pPowerLevelBW20,
- u8 *pPowerLevelBW40,
- u8 Channel)
+void rtl88eu_phy_rf6052_set_ofdm_txpower(struct adapter *adapt,
+ u8 *pwr_level_ofdm,
+ u8 *pwr_level_bw20,
+ u8 *pwr_level_bw40, u8 channel)
{
- struct hal_data_8188e *pHalData = GET_HAL_DATA(Adapter);
- u32 writeVal[2], powerBase0[2], powerBase1[2], pwrtrac_value;
+ struct hal_data_8188e *hal_data = GET_HAL_DATA(adapt);
+ u32 write_val[2], powerbase0[2], powerbase1[2], pwrtrac_value;
u8 direction;
u8 index = 0;
- getpowerbase88e(Adapter, pPowerLevelOFDM, pPowerLevelBW20, pPowerLevelBW40, Channel, &powerBase0[0], &powerBase1[0]);
+ getpowerbase88e(adapt, pwr_level_ofdm, pwr_level_bw20, pwr_level_bw40,
+ channel, &powerbase0[0], &powerbase1[0]);
- /* 2012/04/23 MH According to power tracking value, we need to revise OFDM tx power. */
- /* This is ued to fix unstable power tracking mode. */
- ODM_TxPwrTrackAdjust88E(&pHalData->odmpriv, 0, &direction, &pwrtrac_value);
+ ODM_TxPwrTrackAdjust88E(&hal_data->odmpriv, 0, &direction, &pwrtrac_value);
for (index = 0; index < 6; index++) {
- get_rx_power_val_by_reg(Adapter, Channel, index,
- &powerBase0[0], &powerBase1[0],
- &writeVal[0]);
+ get_rx_power_val_by_reg(adapt, channel, index,
+ &powerbase0[0], &powerbase1[0],
+ &write_val[0]);
if (direction == 1) {
- writeVal[0] += pwrtrac_value;
- writeVal[1] += pwrtrac_value;
+ write_val[0] += pwrtrac_value;
+ write_val[1] += pwrtrac_value;
} else if (direction == 2) {
- writeVal[0] -= pwrtrac_value;
- writeVal[1] -= pwrtrac_value;
+ write_val[0] -= pwrtrac_value;
+ write_val[1] -= pwrtrac_value;
}
- writeOFDMPowerReg88E(Adapter, index, &writeVal[0]);
+ writeOFDMPowerReg88E(adapt, index, &write_val[0]);
}
}
diff --git a/drivers/staging/rtl8188eu/include/rf.h b/drivers/staging/rtl8188eu/include/rf.h
index 82bd076..3b97ee3 100644
--- a/drivers/staging/rtl8188eu/include/rf.h
+++ b/drivers/staging/rtl8188eu/include/rf.h
@@ -2,3 +2,7 @@ void rtl88eu_phy_rf6052_set_bandwidth(struct adapter *adapt,
enum ht_channel_width bandwidth);
void rtl88eu_phy_rf6052_set_cck_txpower(struct adapter *adapt,
u8 *powerlevel);
+void rtl88eu_phy_rf6052_set_ofdm_txpower(struct adapter *adapt,
+ u8 *powerlevel_ofdm,
+ u8 *powerlevel_bw20,
+ u8 *powerlevel_bw40, u8 channel);
diff --git a/drivers/staging/rtl8188eu/include/rtl8188e_rf.h b/drivers/staging/rtl8188eu/include/rtl8188e_rf.h
index 22a70d0..445f123 100644
--- a/drivers/staging/rtl8188eu/include/rtl8188e_rf.h
+++ b/drivers/staging/rtl8188eu/include/rtl8188e_rf.h
@@ -28,7 +28,5 @@
void rtl8188e_RF_ChangeTxPath(struct adapter *Adapter, u16 DataRate);
void rtl8188e_PHY_RF6052SetBandwidth(struct adapter *Adapter,
enum ht_channel_width Bandwidth);
-void rtl8188e_PHY_RF6052SetOFDMTxPower(struct adapter *Adapter, u8 *ofdm,
- u8 *pwrbw20, u8 *pwrbw40, u8 channel);
#endif/* __RTL8188E_RF_H__ */
--
1.7.10.4
^ permalink raw reply [flat|nested] 9+ messages in thread* [PATCH 5/9] staging: rtl8188eu: Rework function writeOFDMPowerReg88E()
2014-08-31 8:38 [PATCH 1/9] staging: rtl8188eu: Rework function rtl8188e_PHY_RF6052SetBandwidth() navin patidar
` (2 preceding siblings ...)
2014-08-31 8:38 ` [PATCH 4/9] staging: rtl8188eu: Rework function rtl8188e_PHY_RF6052SetOFDMTxPower() navin patidar
@ 2014-08-31 8:38 ` navin patidar
2014-08-31 8:38 ` [PATCH 6/9] staging: rtl8188eu: Rework function get_rx_power_val_by_reg() navin patidar
` (3 subsequent siblings)
7 siblings, 0 replies; 9+ messages in thread
From: navin patidar @ 2014-08-31 8:38 UTC (permalink / raw)
To: gregkh; +Cc: Larry.Finger, devel, linux-kernel, navin patidar
Rename CamelCase variables and function name.
Remove a block of the code which is executed only if RF type is T2R2 but
rtl8188eu's RF is a T1R1 type, so driver doesn't need that code.
Signed-off-by: navin patidar <navin.patidar@gmail.com>
---
drivers/staging/rtl8188eu/hal/rtl8188e_rf6052.c | 50 +++++++----------------
1 file changed, 15 insertions(+), 35 deletions(-)
diff --git a/drivers/staging/rtl8188eu/hal/rtl8188e_rf6052.c b/drivers/staging/rtl8188eu/hal/rtl8188e_rf6052.c
index d63529b..7797b38 100644
--- a/drivers/staging/rtl8188eu/hal/rtl8188e_rf6052.c
+++ b/drivers/staging/rtl8188eu/hal/rtl8188e_rf6052.c
@@ -253,55 +253,35 @@ static void get_rx_power_val_by_reg(struct adapter *Adapter, u8 Channel,
*(pOutWriteVal+rf) = writeVal;
}
}
-static void writeOFDMPowerReg88E(struct adapter *Adapter, u8 index, u32 *pValue)
+
+static void write_ofdm_pwr_reg(struct adapter *adapt, u8 index, u32 *pvalue)
{
- struct hal_data_8188e *pHalData = GET_HAL_DATA(Adapter);
- u16 regoffset_a[6] = {
- rTxAGC_A_Rate18_06, rTxAGC_A_Rate54_24,
- rTxAGC_A_Mcs03_Mcs00, rTxAGC_A_Mcs07_Mcs04,
- rTxAGC_A_Mcs11_Mcs08, rTxAGC_A_Mcs15_Mcs12};
- u16 regoffset_b[6] = {
- rTxAGC_B_Rate18_06, rTxAGC_B_Rate54_24,
- rTxAGC_B_Mcs03_Mcs00, rTxAGC_B_Mcs07_Mcs04,
- rTxAGC_B_Mcs11_Mcs08, rTxAGC_B_Mcs15_Mcs12};
+ u16 regoffset_a[6] = { rTxAGC_A_Rate18_06, rTxAGC_A_Rate54_24,
+ rTxAGC_A_Mcs03_Mcs00, rTxAGC_A_Mcs07_Mcs04,
+ rTxAGC_A_Mcs11_Mcs08, rTxAGC_A_Mcs15_Mcs12 };
+ u16 regoffset_b[6] = { rTxAGC_B_Rate18_06, rTxAGC_B_Rate54_24,
+ rTxAGC_B_Mcs03_Mcs00, rTxAGC_B_Mcs07_Mcs04,
+ rTxAGC_B_Mcs11_Mcs08, rTxAGC_B_Mcs15_Mcs12 };
u8 i, rf, pwr_val[4];
- u32 writeVal;
+ u32 write_val;
u16 regoffset;
for (rf = 0; rf < 2; rf++) {
- writeVal = pValue[rf];
+ write_val = pvalue[rf];
for (i = 0; i < 4; i++) {
- pwr_val[i] = (u8)((writeVal & (0x7f<<(i*8)))>>(i*8));
+ pwr_val[i] = (u8)((write_val & (0x7f<<(i*8)))>>(i*8));
if (pwr_val[i] > RF6052_MAX_TX_PWR)
pwr_val[i] = RF6052_MAX_TX_PWR;
}
- writeVal = (pwr_val[3]<<24) | (pwr_val[2]<<16) | (pwr_val[1]<<8) | pwr_val[0];
+ write_val = (pwr_val[3]<<24) | (pwr_val[2]<<16) |
+ (pwr_val[1]<<8) | pwr_val[0];
if (rf == 0)
regoffset = regoffset_a[index];
else
regoffset = regoffset_b[index];
- phy_set_bb_reg(Adapter, regoffset, bMaskDWord, writeVal);
-
- /* 201005115 Joseph: Set Tx Power diff for Tx power training mechanism. */
- if (((pHalData->rf_type == RF_2T2R) &&
- (regoffset == rTxAGC_A_Mcs15_Mcs12 || regoffset == rTxAGC_B_Mcs15_Mcs12)) ||
- ((pHalData->rf_type != RF_2T2R) &&
- (regoffset == rTxAGC_A_Mcs07_Mcs04 || regoffset == rTxAGC_B_Mcs07_Mcs04))) {
- writeVal = pwr_val[3];
- if (regoffset == rTxAGC_A_Mcs15_Mcs12 || regoffset == rTxAGC_A_Mcs07_Mcs04)
- regoffset = 0xc90;
- if (regoffset == rTxAGC_B_Mcs15_Mcs12 || regoffset == rTxAGC_B_Mcs07_Mcs04)
- regoffset = 0xc98;
- for (i = 0; i < 3; i++) {
- if (i != 2)
- writeVal = (writeVal > 8) ? (writeVal-8) : 0;
- else
- writeVal = (writeVal > 6) ? (writeVal-6) : 0;
- usb_write8(Adapter, (u32)(regoffset+i), (u8)writeVal);
- }
- }
+ phy_set_bb_reg(adapt, regoffset, bMaskDWord, write_val);
}
}
@@ -332,6 +312,6 @@ void rtl88eu_phy_rf6052_set_ofdm_txpower(struct adapter *adapt,
write_val[0] -= pwrtrac_value;
write_val[1] -= pwrtrac_value;
}
- writeOFDMPowerReg88E(adapt, index, &write_val[0]);
+ write_ofdm_pwr_reg(adapt, index, &write_val[0]);
}
}
--
1.7.10.4
^ permalink raw reply [flat|nested] 9+ messages in thread* [PATCH 6/9] staging: rtl8188eu: Rework function get_rx_power_val_by_reg()
2014-08-31 8:38 [PATCH 1/9] staging: rtl8188eu: Rework function rtl8188e_PHY_RF6052SetBandwidth() navin patidar
` (3 preceding siblings ...)
2014-08-31 8:38 ` [PATCH 5/9] staging: rtl8188eu: Rework function writeOFDMPowerReg88E() navin patidar
@ 2014-08-31 8:38 ` navin patidar
2014-08-31 8:38 ` [PATCH 7/9] staging: rtl8188eu: Remove file rtl8188e_rf.h navin patidar
` (2 subsequent siblings)
7 siblings, 0 replies; 9+ messages in thread
From: navin patidar @ 2014-08-31 8:38 UTC (permalink / raw)
To: gregkh; +Cc: Larry.Finger, devel, linux-kernel, navin patidar
Rename CamelCase variables.
Remove block of the code which is specific to the bluetooth.
Signed-off-by: navin patidar <navin.patidar@gmail.com>
---
drivers/staging/rtl8188eu/hal/rtl8188e_rf6052.c | 92 +++++++++++------------
1 file changed, 45 insertions(+), 47 deletions(-)
diff --git a/drivers/staging/rtl8188eu/hal/rtl8188e_rf6052.c b/drivers/staging/rtl8188eu/hal/rtl8188e_rf6052.c
index 7797b38..79a329d 100644
--- a/drivers/staging/rtl8188eu/hal/rtl8188e_rf6052.c
+++ b/drivers/staging/rtl8188eu/hal/rtl8188e_rf6052.c
@@ -154,65 +154,66 @@ static void getpowerbase88e(struct adapter *adapt, u8 *pwr_level_ofdm,
*(mcs_base+i) = powerbase1;
}
}
-static void get_rx_power_val_by_reg(struct adapter *Adapter, u8 Channel,
- u8 index, u32 *powerBase0, u32 *powerBase1,
- u32 *pOutWriteVal)
+static void get_rx_power_val_by_reg(struct adapter *adapt, u8 channel,
+ u8 index, u32 *powerbase0, u32 *powerbase1,
+ u32 *out_val)
{
- struct hal_data_8188e *pHalData = GET_HAL_DATA(Adapter);
- struct dm_priv *pdmpriv = &pHalData->dmpriv;
- u8 i, chnlGroup = 0, pwr_diff_limit[4], customer_pwr_limit;
- s8 pwr_diff = 0;
- u32 writeVal, customer_limit, rf;
- u8 Regulatory = pHalData->EEPROMRegulatory;
+ struct hal_data_8188e *hal_data = GET_HAL_DATA(adapt);
+ struct dm_priv *pdmpriv = &hal_data->dmpriv;
+ u8 i, chnlGroup = 0, pwr_diff_limit[4], customer_pwr_limit;
+ s8 pwr_diff = 0;
+ u32 write_val, customer_limit, rf;
+ u8 regulatory = hal_data->EEPROMRegulatory;
/* Index 0 & 1= legacy OFDM, 2-5=HT_MCS rate */
for (rf = 0; rf < 2; rf++) {
- switch (Regulatory) {
- case 0: /* Realtek better performance */
- /* increase power diff defined by Realtek for large power */
+ u8 j = index + (rf ? 8 : 0);
+
+ switch (regulatory) {
+ case 0:
chnlGroup = 0;
- writeVal = pHalData->MCSTxPowerLevelOriginalOffset[chnlGroup][index+(rf ? 8 : 0)] +
- ((index < 2) ? powerBase0[rf] : powerBase1[rf]);
+ write_val = hal_data->MCSTxPowerLevelOriginalOffset[chnlGroup][index+(rf ? 8 : 0)] +
+ ((index < 2) ? powerbase0[rf] : powerbase1[rf]);
break;
- case 1: /* Realtek regulatory */
+ case 1: /* Realtek regulatory */
/* increase power diff defined by Realtek for regulatory */
- if (pHalData->pwrGroupCnt == 1)
+ if (hal_data->pwrGroupCnt == 1)
chnlGroup = 0;
- if (pHalData->pwrGroupCnt >= pHalData->PGMaxGroup) {
- if (Channel < 3) /* Channel 1-2 */
+ if (hal_data->pwrGroupCnt >= hal_data->PGMaxGroup) {
+ if (channel < 3)
chnlGroup = 0;
- else if (Channel < 6) /* Channel 3-5 */
+ else if (channel < 6)
chnlGroup = 1;
- else if (Channel < 9) /* Channel 6-8 */
+ else if (channel < 9)
chnlGroup = 2;
- else if (Channel < 12) /* Channel 9-11 */
+ else if (channel < 12)
chnlGroup = 3;
- else if (Channel < 14) /* Channel 12-13 */
+ else if (channel < 14)
chnlGroup = 4;
- else if (Channel == 14) /* Channel 14 */
+ else if (channel == 14)
chnlGroup = 5;
}
- writeVal = pHalData->MCSTxPowerLevelOriginalOffset[chnlGroup][index+(rf ? 8 : 0)] +
- ((index < 2) ? powerBase0[rf] : powerBase1[rf]);
+ write_val = hal_data->MCSTxPowerLevelOriginalOffset[chnlGroup][index+(rf ? 8 : 0)] +
+ ((index < 2) ? powerbase0[rf] : powerbase1[rf]);
break;
case 2: /* Better regulatory */
/* don't increase any power diff */
- writeVal = ((index < 2) ? powerBase0[rf] : powerBase1[rf]);
+ write_val = ((index < 2) ? powerbase0[rf] : powerbase1[rf]);
break;
case 3: /* Customer defined power diff. */
/* increase power diff defined by customer. */
chnlGroup = 0;
if (index < 2)
- pwr_diff = pHalData->TxPwrLegacyHtDiff[rf][Channel-1];
- else if (pHalData->CurrentChannelBW == HT_CHANNEL_WIDTH_20)
- pwr_diff = pHalData->TxPwrHt20Diff[rf][Channel-1];
+ pwr_diff = hal_data->TxPwrLegacyHtDiff[rf][channel-1];
+ else if (hal_data->CurrentChannelBW == HT_CHANNEL_WIDTH_20)
+ pwr_diff = hal_data->TxPwrHt20Diff[rf][channel-1];
- if (pHalData->CurrentChannelBW == HT_CHANNEL_WIDTH_40)
- customer_pwr_limit = pHalData->PwrGroupHT40[rf][Channel-1];
+ if (hal_data->CurrentChannelBW == HT_CHANNEL_WIDTH_40)
+ customer_pwr_limit = hal_data->PwrGroupHT40[rf][channel-1];
else
- customer_pwr_limit = pHalData->PwrGroupHT20[rf][Channel-1];
+ customer_pwr_limit = hal_data->PwrGroupHT20[rf][channel-1];
if (pwr_diff >= customer_pwr_limit)
pwr_diff = 0;
@@ -220,19 +221,22 @@ static void get_rx_power_val_by_reg(struct adapter *Adapter, u8 Channel,
pwr_diff = customer_pwr_limit - pwr_diff;
for (i = 0; i < 4; i++) {
- pwr_diff_limit[i] = (u8)((pHalData->MCSTxPowerLevelOriginalOffset[chnlGroup][index+(rf ? 8 : 0)]&(0x7f<<(i*8)))>>(i*8));
+ pwr_diff_limit[i] = (u8)((hal_data->MCSTxPowerLevelOriginalOffset[chnlGroup][j] &
+ (0x7f << (i * 8))) >> (i * 8));
if (pwr_diff_limit[i] > pwr_diff)
pwr_diff_limit[i] = pwr_diff;
}
- customer_limit = (pwr_diff_limit[3]<<24) | (pwr_diff_limit[2]<<16) |
- (pwr_diff_limit[1]<<8) | (pwr_diff_limit[0]);
- writeVal = customer_limit + ((index < 2) ? powerBase0[rf] : powerBase1[rf]);
+ customer_limit = (pwr_diff_limit[3]<<24) |
+ (pwr_diff_limit[2]<<16) |
+ (pwr_diff_limit[1]<<8) |
+ (pwr_diff_limit[0]);
+ write_val = customer_limit + ((index < 2) ? powerbase0[rf] : powerbase1[rf]);
break;
default:
chnlGroup = 0;
- writeVal = pHalData->MCSTxPowerLevelOriginalOffset[chnlGroup][index+(rf ? 8 : 0)] +
- ((index < 2) ? powerBase0[rf] : powerBase1[rf]);
+ write_val = hal_data->MCSTxPowerLevelOriginalOffset[chnlGroup][j] +
+ ((index < 2) ? powerbase0[rf] : powerbase1[rf]);
break;
}
/* 20100427 Joseph: Driver dynamic Tx power shall not affect Tx power. It shall be determined by power training mechanism. */
@@ -240,17 +244,11 @@ static void get_rx_power_val_by_reg(struct adapter *Adapter, u8 Channel,
/* In the future, two mechanism shall be separated from each other and maintained independently. Thanks for Lanhsin's reminder. */
/* 92d do not need this */
if (pdmpriv->DynamicTxHighPowerLvl == TxHighPwrLevel_Level1)
- writeVal = 0x14141414;
+ write_val = 0x14141414;
else if (pdmpriv->DynamicTxHighPowerLvl == TxHighPwrLevel_Level2)
- writeVal = 0x00000000;
+ write_val = 0x00000000;
- /* 20100628 Joseph: High power mode for BT-Coexist mechanism. */
- /* This mechanism is only applied when Driver-Highpower-Mechanism is OFF. */
- if (pdmpriv->DynamicTxHighPowerLvl == TxHighPwrLevel_BT1)
- writeVal = writeVal - 0x06060606;
- else if (pdmpriv->DynamicTxHighPowerLvl == TxHighPwrLevel_BT2)
- writeVal = writeVal;
- *(pOutWriteVal+rf) = writeVal;
+ *(out_val+rf) = write_val;
}
}
--
1.7.10.4
^ permalink raw reply [flat|nested] 9+ messages in thread* [PATCH 7/9] staging: rtl8188eu: Remove file rtl8188e_rf.h
2014-08-31 8:38 [PATCH 1/9] staging: rtl8188eu: Rework function rtl8188e_PHY_RF6052SetBandwidth() navin patidar
` (4 preceding siblings ...)
2014-08-31 8:38 ` [PATCH 6/9] staging: rtl8188eu: Rework function get_rx_power_val_by_reg() navin patidar
@ 2014-08-31 8:38 ` navin patidar
2014-08-31 8:38 ` [PATCH 8/9] staging: rtl8188eu: Rename rtl8188e_rf6052.c to rf.c navin patidar
2014-08-31 8:38 ` [PATCH 9/9] staging: rtl8188eu: Remove unused function SetBcnCtrlReg() navin patidar
7 siblings, 0 replies; 9+ messages in thread
From: navin patidar @ 2014-08-31 8:38 UTC (permalink / raw)
To: gregkh; +Cc: Larry.Finger, devel, linux-kernel, navin patidar
Move macros from rtl8188e_rf.h to rf.h and then remove rtl8188e_rf.h .
Signed-off-by: navin patidar <navin.patidar@gmail.com>
---
drivers/staging/rtl8188eu/hal/rtl8188e_rf6052.c | 1 +
drivers/staging/rtl8188eu/include/rf.h | 3 ++
drivers/staging/rtl8188eu/include/rtl8188e_hal.h | 1 -
drivers/staging/rtl8188eu/include/rtl8188e_rf.h | 32 ----------------------
4 files changed, 4 insertions(+), 33 deletions(-)
delete mode 100644 drivers/staging/rtl8188eu/include/rtl8188e_rf.h
diff --git a/drivers/staging/rtl8188eu/hal/rtl8188e_rf6052.c b/drivers/staging/rtl8188eu/hal/rtl8188e_rf6052.c
index 79a329d..6ae22b0 100644
--- a/drivers/staging/rtl8188eu/hal/rtl8188e_rf6052.c
+++ b/drivers/staging/rtl8188eu/hal/rtl8188e_rf6052.c
@@ -20,6 +20,7 @@
#include <osdep_service.h>
#include <drv_types.h>
#include <phy.h>
+#include <rf.h>
#include <rtl8188e_hal.h>
void rtl88eu_phy_rf6052_set_bandwidth(struct adapter *adapt,
diff --git a/drivers/staging/rtl8188eu/include/rf.h b/drivers/staging/rtl8188eu/include/rf.h
index 3b97ee3..98a5551 100644
--- a/drivers/staging/rtl8188eu/include/rf.h
+++ b/drivers/staging/rtl8188eu/include/rf.h
@@ -1,3 +1,6 @@
+#define RF6052_MAX_TX_PWR 0x3F
+#define RF6052_MAX_REG 0x3F
+
void rtl88eu_phy_rf6052_set_bandwidth(struct adapter *adapt,
enum ht_channel_width bandwidth);
void rtl88eu_phy_rf6052_set_cck_txpower(struct adapter *adapt,
diff --git a/drivers/staging/rtl8188eu/include/rtl8188e_hal.h b/drivers/staging/rtl8188eu/include/rtl8188e_hal.h
index 814ba1a..f5abe01 100644
--- a/drivers/staging/rtl8188eu/include/rtl8188e_hal.h
+++ b/drivers/staging/rtl8188eu/include/rtl8188e_hal.h
@@ -25,7 +25,6 @@
#include "rtl8188e_spec.h"
#include "Hal8188EPhyReg.h"
#include "Hal8188EPhyCfg.h"
-#include "rtl8188e_rf.h"
#include "rtl8188e_dm.h"
#include "rtl8188e_recv.h"
#include "rtl8188e_xmit.h"
diff --git a/drivers/staging/rtl8188eu/include/rtl8188e_rf.h b/drivers/staging/rtl8188eu/include/rtl8188e_rf.h
deleted file mode 100644
index 445f123..0000000
--- a/drivers/staging/rtl8188eu/include/rtl8188e_rf.h
+++ /dev/null
@@ -1,32 +0,0 @@
-/******************************************************************************
- *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of version 2 of the GNU General Public License as
- * published by the Free Software Foundation.
- *
- * This program is distributed in the hope that it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
- * more details.
- *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- *
- ******************************************************************************/
-#ifndef __RTL8188E_RF_H__
-#define __RTL8188E_RF_H__
-
-#define RF6052_MAX_TX_PWR 0x3F
-#define RF6052_MAX_REG 0x3F
-#define RF6052_MAX_PATH 2
-
-
-void rtl8188e_RF_ChangeTxPath(struct adapter *Adapter, u16 DataRate);
-void rtl8188e_PHY_RF6052SetBandwidth(struct adapter *Adapter,
- enum ht_channel_width Bandwidth);
-
-#endif/* __RTL8188E_RF_H__ */
--
1.7.10.4
^ permalink raw reply [flat|nested] 9+ messages in thread* [PATCH 8/9] staging: rtl8188eu: Rename rtl8188e_rf6052.c to rf.c
2014-08-31 8:38 [PATCH 1/9] staging: rtl8188eu: Rework function rtl8188e_PHY_RF6052SetBandwidth() navin patidar
` (5 preceding siblings ...)
2014-08-31 8:38 ` [PATCH 7/9] staging: rtl8188eu: Remove file rtl8188e_rf.h navin patidar
@ 2014-08-31 8:38 ` navin patidar
2014-08-31 8:38 ` [PATCH 9/9] staging: rtl8188eu: Remove unused function SetBcnCtrlReg() navin patidar
7 siblings, 0 replies; 9+ messages in thread
From: navin patidar @ 2014-08-31 8:38 UTC (permalink / raw)
To: gregkh; +Cc: Larry.Finger, devel, linux-kernel, navin patidar
Signed-off-by: navin patidar <navin.patidar@gmail.com>
---
drivers/staging/rtl8188eu/Makefile | 2 +-
drivers/staging/rtl8188eu/hal/rf.c | 316 +++++++++++++++++++++++
drivers/staging/rtl8188eu/hal/rtl8188e_rf6052.c | 316 -----------------------
3 files changed, 317 insertions(+), 317 deletions(-)
create mode 100644 drivers/staging/rtl8188eu/hal/rf.c
delete mode 100644 drivers/staging/rtl8188eu/hal/rtl8188e_rf6052.c
diff --git a/drivers/staging/rtl8188eu/Makefile b/drivers/staging/rtl8188eu/Makefile
index 20225b3..af919c3 100644
--- a/drivers/staging/rtl8188eu/Makefile
+++ b/drivers/staging/rtl8188eu/Makefile
@@ -35,7 +35,7 @@ r8188eu-y := \
hal/rtl8188e_dm.o \
hal/rtl8188e_hal_init.o \
hal/phy.o \
- hal/rtl8188e_rf6052.o \
+ hal/rf.o \
hal/rtl8188e_rxdesc.o \
hal/rtl8188e_xmit.o \
hal/rtl8188eu_led.o \
diff --git a/drivers/staging/rtl8188eu/hal/rf.c b/drivers/staging/rtl8188eu/hal/rf.c
new file mode 100644
index 0000000..6ae22b0
--- /dev/null
+++ b/drivers/staging/rtl8188eu/hal/rf.c
@@ -0,0 +1,316 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ ******************************************************************************/
+
+#include <osdep_service.h>
+#include <drv_types.h>
+#include <phy.h>
+#include <rf.h>
+#include <rtl8188e_hal.h>
+
+void rtl88eu_phy_rf6052_set_bandwidth(struct adapter *adapt,
+ enum ht_channel_width bandwidth)
+{
+ struct hal_data_8188e *hal_data = GET_HAL_DATA(adapt);
+
+ switch (bandwidth) {
+ case HT_CHANNEL_WIDTH_20:
+ hal_data->RfRegChnlVal[0] = ((hal_data->RfRegChnlVal[0] &
+ 0xfffff3ff) | BIT(10) | BIT(11));
+ phy_set_rf_reg(adapt, RF_PATH_A, RF_CHNLBW, bRFRegOffsetMask,
+ hal_data->RfRegChnlVal[0]);
+ break;
+ case HT_CHANNEL_WIDTH_40:
+ hal_data->RfRegChnlVal[0] = ((hal_data->RfRegChnlVal[0] &
+ 0xfffff3ff) | BIT(10));
+ phy_set_rf_reg(adapt, RF_PATH_A, RF_CHNLBW, bRFRegOffsetMask,
+ hal_data->RfRegChnlVal[0]);
+ break;
+ default:
+ break;
+ }
+}
+
+void rtl88eu_phy_rf6052_set_cck_txpower(struct adapter *adapt, u8 *powerlevel)
+{
+ struct hal_data_8188e *hal_data = GET_HAL_DATA(adapt);
+ struct dm_priv *pdmpriv = &hal_data->dmpriv;
+ struct mlme_ext_priv *pmlmeext = &adapt->mlmeextpriv;
+ u32 tx_agc[2] = {0, 0}, tmpval = 0, pwrtrac_value;
+ u8 idx1, idx2;
+ u8 *ptr;
+ u8 direction;
+
+
+ if (pmlmeext->sitesurvey_res.state == SCAN_PROCESS) {
+ tx_agc[RF_PATH_A] = 0x3f3f3f3f;
+ tx_agc[RF_PATH_B] = 0x3f3f3f3f;
+ for (idx1 = RF_PATH_A; idx1 <= RF_PATH_B; idx1++) {
+ tx_agc[idx1] = powerlevel[idx1] |
+ (powerlevel[idx1]<<8) |
+ (powerlevel[idx1]<<16) |
+ (powerlevel[idx1]<<24);
+ if (tx_agc[idx1] > 0x20 && hal_data->ExternalPA)
+ tx_agc[idx1] = 0x20;
+ }
+ } else {
+ if (pdmpriv->DynamicTxHighPowerLvl == TxHighPwrLevel_Level1) {
+ tx_agc[RF_PATH_A] = 0x10101010;
+ tx_agc[RF_PATH_B] = 0x10101010;
+ } else if (pdmpriv->DynamicTxHighPowerLvl == TxHighPwrLevel_Level2) {
+ tx_agc[RF_PATH_A] = 0x00000000;
+ tx_agc[RF_PATH_B] = 0x00000000;
+ } else {
+ for (idx1 = RF_PATH_A; idx1 <= RF_PATH_B; idx1++) {
+ tx_agc[idx1] = powerlevel[idx1] |
+ (powerlevel[idx1]<<8) |
+ (powerlevel[idx1]<<16) |
+ (powerlevel[idx1]<<24);
+ }
+ if (hal_data->EEPROMRegulatory == 0) {
+ tmpval = hal_data->MCSTxPowerLevelOriginalOffset[0][6] +
+ (hal_data->MCSTxPowerLevelOriginalOffset[0][7]<<8);
+ tx_agc[RF_PATH_A] += tmpval;
+
+ tmpval = hal_data->MCSTxPowerLevelOriginalOffset[0][14] +
+ (hal_data->MCSTxPowerLevelOriginalOffset[0][15]<<24);
+ tx_agc[RF_PATH_B] += tmpval;
+ }
+ }
+ }
+ for (idx1 = RF_PATH_A; idx1 <= RF_PATH_B; idx1++) {
+ ptr = (u8 *)(&(tx_agc[idx1]));
+ for (idx2 = 0; idx2 < 4; idx2++) {
+ if (*ptr > RF6052_MAX_TX_PWR)
+ *ptr = RF6052_MAX_TX_PWR;
+ ptr++;
+ }
+ }
+ ODM_TxPwrTrackAdjust88E(&hal_data->odmpriv, 1, &direction, &pwrtrac_value);
+
+ if (direction == 1) {
+ /* Increase TX power */
+ tx_agc[0] += pwrtrac_value;
+ tx_agc[1] += pwrtrac_value;
+ } else if (direction == 2) {
+ /* Decrease TX power */
+ tx_agc[0] -= pwrtrac_value;
+ tx_agc[1] -= pwrtrac_value;
+ }
+
+ /* rf-A cck tx power */
+ tmpval = tx_agc[RF_PATH_A]&0xff;
+ phy_set_bb_reg(adapt, rTxAGC_A_CCK1_Mcs32, bMaskByte1, tmpval);
+ tmpval = tx_agc[RF_PATH_A]>>8;
+ phy_set_bb_reg(adapt, rTxAGC_B_CCK11_A_CCK2_11, 0xffffff00, tmpval);
+
+ /* rf-B cck tx power */
+ tmpval = tx_agc[RF_PATH_B]>>24;
+ phy_set_bb_reg(adapt, rTxAGC_B_CCK11_A_CCK2_11, bMaskByte0, tmpval);
+ tmpval = tx_agc[RF_PATH_B]&0x00ffffff;
+ phy_set_bb_reg(adapt, rTxAGC_B_CCK1_55_Mcs32, 0xffffff00, tmpval);
+}
+
+/* powerbase0 for OFDM rates */
+/* powerbase1 for HT MCS rates */
+static void getpowerbase88e(struct adapter *adapt, u8 *pwr_level_ofdm,
+ u8 *pwr_level_bw20, u8 *pwr_level_bw40,
+ u8 channel,u32 *ofdmbase, u32 *mcs_base)
+{
+ struct hal_data_8188e *hal_data = GET_HAL_DATA(adapt);
+ u32 powerbase0, powerbase1;
+ u8 i, powerlevel[2];
+
+ for (i = 0; i < 2; i++) {
+ powerbase0 = pwr_level_ofdm[i];
+
+ powerbase0 = (powerbase0<<24) | (powerbase0<<16) |
+ (powerbase0<<8) | powerbase0;
+ *(ofdmbase+i) = powerbase0;
+ }
+ for (i = 0; i < hal_data->NumTotalRFPath; i++) {
+ /* Check HT20 to HT40 diff */
+ if (hal_data->CurrentChannelBW == HT_CHANNEL_WIDTH_20)
+ powerlevel[i] = pwr_level_bw20[i];
+ else
+ powerlevel[i] = pwr_level_bw40[i];
+ powerbase1 = powerlevel[i];
+ powerbase1 = (powerbase1<<24) | (powerbase1<<16) |
+ (powerbase1<<8) | powerbase1;
+ *(mcs_base+i) = powerbase1;
+ }
+}
+static void get_rx_power_val_by_reg(struct adapter *adapt, u8 channel,
+ u8 index, u32 *powerbase0, u32 *powerbase1,
+ u32 *out_val)
+{
+ struct hal_data_8188e *hal_data = GET_HAL_DATA(adapt);
+ struct dm_priv *pdmpriv = &hal_data->dmpriv;
+ u8 i, chnlGroup = 0, pwr_diff_limit[4], customer_pwr_limit;
+ s8 pwr_diff = 0;
+ u32 write_val, customer_limit, rf;
+ u8 regulatory = hal_data->EEPROMRegulatory;
+
+ /* Index 0 & 1= legacy OFDM, 2-5=HT_MCS rate */
+
+ for (rf = 0; rf < 2; rf++) {
+ u8 j = index + (rf ? 8 : 0);
+
+ switch (regulatory) {
+ case 0:
+ chnlGroup = 0;
+ write_val = hal_data->MCSTxPowerLevelOriginalOffset[chnlGroup][index+(rf ? 8 : 0)] +
+ ((index < 2) ? powerbase0[rf] : powerbase1[rf]);
+ break;
+ case 1: /* Realtek regulatory */
+ /* increase power diff defined by Realtek for regulatory */
+ if (hal_data->pwrGroupCnt == 1)
+ chnlGroup = 0;
+ if (hal_data->pwrGroupCnt >= hal_data->PGMaxGroup) {
+ if (channel < 3)
+ chnlGroup = 0;
+ else if (channel < 6)
+ chnlGroup = 1;
+ else if (channel < 9)
+ chnlGroup = 2;
+ else if (channel < 12)
+ chnlGroup = 3;
+ else if (channel < 14)
+ chnlGroup = 4;
+ else if (channel == 14)
+ chnlGroup = 5;
+ }
+ write_val = hal_data->MCSTxPowerLevelOriginalOffset[chnlGroup][index+(rf ? 8 : 0)] +
+ ((index < 2) ? powerbase0[rf] : powerbase1[rf]);
+ break;
+ case 2: /* Better regulatory */
+ /* don't increase any power diff */
+ write_val = ((index < 2) ? powerbase0[rf] : powerbase1[rf]);
+ break;
+ case 3: /* Customer defined power diff. */
+ /* increase power diff defined by customer. */
+ chnlGroup = 0;
+
+ if (index < 2)
+ pwr_diff = hal_data->TxPwrLegacyHtDiff[rf][channel-1];
+ else if (hal_data->CurrentChannelBW == HT_CHANNEL_WIDTH_20)
+ pwr_diff = hal_data->TxPwrHt20Diff[rf][channel-1];
+
+ if (hal_data->CurrentChannelBW == HT_CHANNEL_WIDTH_40)
+ customer_pwr_limit = hal_data->PwrGroupHT40[rf][channel-1];
+ else
+ customer_pwr_limit = hal_data->PwrGroupHT20[rf][channel-1];
+
+ if (pwr_diff >= customer_pwr_limit)
+ pwr_diff = 0;
+ else
+ pwr_diff = customer_pwr_limit - pwr_diff;
+
+ for (i = 0; i < 4; i++) {
+ pwr_diff_limit[i] = (u8)((hal_data->MCSTxPowerLevelOriginalOffset[chnlGroup][j] &
+ (0x7f << (i * 8))) >> (i * 8));
+
+ if (pwr_diff_limit[i] > pwr_diff)
+ pwr_diff_limit[i] = pwr_diff;
+ }
+ customer_limit = (pwr_diff_limit[3]<<24) |
+ (pwr_diff_limit[2]<<16) |
+ (pwr_diff_limit[1]<<8) |
+ (pwr_diff_limit[0]);
+ write_val = customer_limit + ((index < 2) ? powerbase0[rf] : powerbase1[rf]);
+ break;
+ default:
+ chnlGroup = 0;
+ write_val = hal_data->MCSTxPowerLevelOriginalOffset[chnlGroup][j] +
+ ((index < 2) ? powerbase0[rf] : powerbase1[rf]);
+ break;
+ }
+/* 20100427 Joseph: Driver dynamic Tx power shall not affect Tx power. It shall be determined by power training mechanism. */
+/* Currently, we cannot fully disable driver dynamic tx power mechanism because it is referenced by BT coexist mechanism. */
+/* In the future, two mechanism shall be separated from each other and maintained independently. Thanks for Lanhsin's reminder. */
+ /* 92d do not need this */
+ if (pdmpriv->DynamicTxHighPowerLvl == TxHighPwrLevel_Level1)
+ write_val = 0x14141414;
+ else if (pdmpriv->DynamicTxHighPowerLvl == TxHighPwrLevel_Level2)
+ write_val = 0x00000000;
+
+ *(out_val+rf) = write_val;
+ }
+}
+
+static void write_ofdm_pwr_reg(struct adapter *adapt, u8 index, u32 *pvalue)
+{
+ u16 regoffset_a[6] = { rTxAGC_A_Rate18_06, rTxAGC_A_Rate54_24,
+ rTxAGC_A_Mcs03_Mcs00, rTxAGC_A_Mcs07_Mcs04,
+ rTxAGC_A_Mcs11_Mcs08, rTxAGC_A_Mcs15_Mcs12 };
+ u16 regoffset_b[6] = { rTxAGC_B_Rate18_06, rTxAGC_B_Rate54_24,
+ rTxAGC_B_Mcs03_Mcs00, rTxAGC_B_Mcs07_Mcs04,
+ rTxAGC_B_Mcs11_Mcs08, rTxAGC_B_Mcs15_Mcs12 };
+ u8 i, rf, pwr_val[4];
+ u32 write_val;
+ u16 regoffset;
+
+ for (rf = 0; rf < 2; rf++) {
+ write_val = pvalue[rf];
+ for (i = 0; i < 4; i++) {
+ pwr_val[i] = (u8)((write_val & (0x7f<<(i*8)))>>(i*8));
+ if (pwr_val[i] > RF6052_MAX_TX_PWR)
+ pwr_val[i] = RF6052_MAX_TX_PWR;
+ }
+ write_val = (pwr_val[3]<<24) | (pwr_val[2]<<16) |
+ (pwr_val[1]<<8) | pwr_val[0];
+
+ if (rf == 0)
+ regoffset = regoffset_a[index];
+ else
+ regoffset = regoffset_b[index];
+
+ phy_set_bb_reg(adapt, regoffset, bMaskDWord, write_val);
+ }
+}
+
+void rtl88eu_phy_rf6052_set_ofdm_txpower(struct adapter *adapt,
+ u8 *pwr_level_ofdm,
+ u8 *pwr_level_bw20,
+ u8 *pwr_level_bw40, u8 channel)
+{
+ struct hal_data_8188e *hal_data = GET_HAL_DATA(adapt);
+ u32 write_val[2], powerbase0[2], powerbase1[2], pwrtrac_value;
+ u8 direction;
+ u8 index = 0;
+
+ getpowerbase88e(adapt, pwr_level_ofdm, pwr_level_bw20, pwr_level_bw40,
+ channel, &powerbase0[0], &powerbase1[0]);
+
+ ODM_TxPwrTrackAdjust88E(&hal_data->odmpriv, 0, &direction, &pwrtrac_value);
+
+ for (index = 0; index < 6; index++) {
+ get_rx_power_val_by_reg(adapt, channel, index,
+ &powerbase0[0], &powerbase1[0],
+ &write_val[0]);
+
+ if (direction == 1) {
+ write_val[0] += pwrtrac_value;
+ write_val[1] += pwrtrac_value;
+ } else if (direction == 2) {
+ write_val[0] -= pwrtrac_value;
+ write_val[1] -= pwrtrac_value;
+ }
+ write_ofdm_pwr_reg(adapt, index, &write_val[0]);
+ }
+}
diff --git a/drivers/staging/rtl8188eu/hal/rtl8188e_rf6052.c b/drivers/staging/rtl8188eu/hal/rtl8188e_rf6052.c
deleted file mode 100644
index 6ae22b0..0000000
--- a/drivers/staging/rtl8188eu/hal/rtl8188e_rf6052.c
+++ /dev/null
@@ -1,316 +0,0 @@
-/******************************************************************************
- *
- * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of version 2 of the GNU General Public License as
- * published by the Free Software Foundation.
- *
- * This program is distributed in the hope that it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
- * more details.
- *
- * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
- *
- ******************************************************************************/
-
-#include <osdep_service.h>
-#include <drv_types.h>
-#include <phy.h>
-#include <rf.h>
-#include <rtl8188e_hal.h>
-
-void rtl88eu_phy_rf6052_set_bandwidth(struct adapter *adapt,
- enum ht_channel_width bandwidth)
-{
- struct hal_data_8188e *hal_data = GET_HAL_DATA(adapt);
-
- switch (bandwidth) {
- case HT_CHANNEL_WIDTH_20:
- hal_data->RfRegChnlVal[0] = ((hal_data->RfRegChnlVal[0] &
- 0xfffff3ff) | BIT(10) | BIT(11));
- phy_set_rf_reg(adapt, RF_PATH_A, RF_CHNLBW, bRFRegOffsetMask,
- hal_data->RfRegChnlVal[0]);
- break;
- case HT_CHANNEL_WIDTH_40:
- hal_data->RfRegChnlVal[0] = ((hal_data->RfRegChnlVal[0] &
- 0xfffff3ff) | BIT(10));
- phy_set_rf_reg(adapt, RF_PATH_A, RF_CHNLBW, bRFRegOffsetMask,
- hal_data->RfRegChnlVal[0]);
- break;
- default:
- break;
- }
-}
-
-void rtl88eu_phy_rf6052_set_cck_txpower(struct adapter *adapt, u8 *powerlevel)
-{
- struct hal_data_8188e *hal_data = GET_HAL_DATA(adapt);
- struct dm_priv *pdmpriv = &hal_data->dmpriv;
- struct mlme_ext_priv *pmlmeext = &adapt->mlmeextpriv;
- u32 tx_agc[2] = {0, 0}, tmpval = 0, pwrtrac_value;
- u8 idx1, idx2;
- u8 *ptr;
- u8 direction;
-
-
- if (pmlmeext->sitesurvey_res.state == SCAN_PROCESS) {
- tx_agc[RF_PATH_A] = 0x3f3f3f3f;
- tx_agc[RF_PATH_B] = 0x3f3f3f3f;
- for (idx1 = RF_PATH_A; idx1 <= RF_PATH_B; idx1++) {
- tx_agc[idx1] = powerlevel[idx1] |
- (powerlevel[idx1]<<8) |
- (powerlevel[idx1]<<16) |
- (powerlevel[idx1]<<24);
- if (tx_agc[idx1] > 0x20 && hal_data->ExternalPA)
- tx_agc[idx1] = 0x20;
- }
- } else {
- if (pdmpriv->DynamicTxHighPowerLvl == TxHighPwrLevel_Level1) {
- tx_agc[RF_PATH_A] = 0x10101010;
- tx_agc[RF_PATH_B] = 0x10101010;
- } else if (pdmpriv->DynamicTxHighPowerLvl == TxHighPwrLevel_Level2) {
- tx_agc[RF_PATH_A] = 0x00000000;
- tx_agc[RF_PATH_B] = 0x00000000;
- } else {
- for (idx1 = RF_PATH_A; idx1 <= RF_PATH_B; idx1++) {
- tx_agc[idx1] = powerlevel[idx1] |
- (powerlevel[idx1]<<8) |
- (powerlevel[idx1]<<16) |
- (powerlevel[idx1]<<24);
- }
- if (hal_data->EEPROMRegulatory == 0) {
- tmpval = hal_data->MCSTxPowerLevelOriginalOffset[0][6] +
- (hal_data->MCSTxPowerLevelOriginalOffset[0][7]<<8);
- tx_agc[RF_PATH_A] += tmpval;
-
- tmpval = hal_data->MCSTxPowerLevelOriginalOffset[0][14] +
- (hal_data->MCSTxPowerLevelOriginalOffset[0][15]<<24);
- tx_agc[RF_PATH_B] += tmpval;
- }
- }
- }
- for (idx1 = RF_PATH_A; idx1 <= RF_PATH_B; idx1++) {
- ptr = (u8 *)(&(tx_agc[idx1]));
- for (idx2 = 0; idx2 < 4; idx2++) {
- if (*ptr > RF6052_MAX_TX_PWR)
- *ptr = RF6052_MAX_TX_PWR;
- ptr++;
- }
- }
- ODM_TxPwrTrackAdjust88E(&hal_data->odmpriv, 1, &direction, &pwrtrac_value);
-
- if (direction == 1) {
- /* Increase TX power */
- tx_agc[0] += pwrtrac_value;
- tx_agc[1] += pwrtrac_value;
- } else if (direction == 2) {
- /* Decrease TX power */
- tx_agc[0] -= pwrtrac_value;
- tx_agc[1] -= pwrtrac_value;
- }
-
- /* rf-A cck tx power */
- tmpval = tx_agc[RF_PATH_A]&0xff;
- phy_set_bb_reg(adapt, rTxAGC_A_CCK1_Mcs32, bMaskByte1, tmpval);
- tmpval = tx_agc[RF_PATH_A]>>8;
- phy_set_bb_reg(adapt, rTxAGC_B_CCK11_A_CCK2_11, 0xffffff00, tmpval);
-
- /* rf-B cck tx power */
- tmpval = tx_agc[RF_PATH_B]>>24;
- phy_set_bb_reg(adapt, rTxAGC_B_CCK11_A_CCK2_11, bMaskByte0, tmpval);
- tmpval = tx_agc[RF_PATH_B]&0x00ffffff;
- phy_set_bb_reg(adapt, rTxAGC_B_CCK1_55_Mcs32, 0xffffff00, tmpval);
-}
-
-/* powerbase0 for OFDM rates */
-/* powerbase1 for HT MCS rates */
-static void getpowerbase88e(struct adapter *adapt, u8 *pwr_level_ofdm,
- u8 *pwr_level_bw20, u8 *pwr_level_bw40,
- u8 channel,u32 *ofdmbase, u32 *mcs_base)
-{
- struct hal_data_8188e *hal_data = GET_HAL_DATA(adapt);
- u32 powerbase0, powerbase1;
- u8 i, powerlevel[2];
-
- for (i = 0; i < 2; i++) {
- powerbase0 = pwr_level_ofdm[i];
-
- powerbase0 = (powerbase0<<24) | (powerbase0<<16) |
- (powerbase0<<8) | powerbase0;
- *(ofdmbase+i) = powerbase0;
- }
- for (i = 0; i < hal_data->NumTotalRFPath; i++) {
- /* Check HT20 to HT40 diff */
- if (hal_data->CurrentChannelBW == HT_CHANNEL_WIDTH_20)
- powerlevel[i] = pwr_level_bw20[i];
- else
- powerlevel[i] = pwr_level_bw40[i];
- powerbase1 = powerlevel[i];
- powerbase1 = (powerbase1<<24) | (powerbase1<<16) |
- (powerbase1<<8) | powerbase1;
- *(mcs_base+i) = powerbase1;
- }
-}
-static void get_rx_power_val_by_reg(struct adapter *adapt, u8 channel,
- u8 index, u32 *powerbase0, u32 *powerbase1,
- u32 *out_val)
-{
- struct hal_data_8188e *hal_data = GET_HAL_DATA(adapt);
- struct dm_priv *pdmpriv = &hal_data->dmpriv;
- u8 i, chnlGroup = 0, pwr_diff_limit[4], customer_pwr_limit;
- s8 pwr_diff = 0;
- u32 write_val, customer_limit, rf;
- u8 regulatory = hal_data->EEPROMRegulatory;
-
- /* Index 0 & 1= legacy OFDM, 2-5=HT_MCS rate */
-
- for (rf = 0; rf < 2; rf++) {
- u8 j = index + (rf ? 8 : 0);
-
- switch (regulatory) {
- case 0:
- chnlGroup = 0;
- write_val = hal_data->MCSTxPowerLevelOriginalOffset[chnlGroup][index+(rf ? 8 : 0)] +
- ((index < 2) ? powerbase0[rf] : powerbase1[rf]);
- break;
- case 1: /* Realtek regulatory */
- /* increase power diff defined by Realtek for regulatory */
- if (hal_data->pwrGroupCnt == 1)
- chnlGroup = 0;
- if (hal_data->pwrGroupCnt >= hal_data->PGMaxGroup) {
- if (channel < 3)
- chnlGroup = 0;
- else if (channel < 6)
- chnlGroup = 1;
- else if (channel < 9)
- chnlGroup = 2;
- else if (channel < 12)
- chnlGroup = 3;
- else if (channel < 14)
- chnlGroup = 4;
- else if (channel == 14)
- chnlGroup = 5;
- }
- write_val = hal_data->MCSTxPowerLevelOriginalOffset[chnlGroup][index+(rf ? 8 : 0)] +
- ((index < 2) ? powerbase0[rf] : powerbase1[rf]);
- break;
- case 2: /* Better regulatory */
- /* don't increase any power diff */
- write_val = ((index < 2) ? powerbase0[rf] : powerbase1[rf]);
- break;
- case 3: /* Customer defined power diff. */
- /* increase power diff defined by customer. */
- chnlGroup = 0;
-
- if (index < 2)
- pwr_diff = hal_data->TxPwrLegacyHtDiff[rf][channel-1];
- else if (hal_data->CurrentChannelBW == HT_CHANNEL_WIDTH_20)
- pwr_diff = hal_data->TxPwrHt20Diff[rf][channel-1];
-
- if (hal_data->CurrentChannelBW == HT_CHANNEL_WIDTH_40)
- customer_pwr_limit = hal_data->PwrGroupHT40[rf][channel-1];
- else
- customer_pwr_limit = hal_data->PwrGroupHT20[rf][channel-1];
-
- if (pwr_diff >= customer_pwr_limit)
- pwr_diff = 0;
- else
- pwr_diff = customer_pwr_limit - pwr_diff;
-
- for (i = 0; i < 4; i++) {
- pwr_diff_limit[i] = (u8)((hal_data->MCSTxPowerLevelOriginalOffset[chnlGroup][j] &
- (0x7f << (i * 8))) >> (i * 8));
-
- if (pwr_diff_limit[i] > pwr_diff)
- pwr_diff_limit[i] = pwr_diff;
- }
- customer_limit = (pwr_diff_limit[3]<<24) |
- (pwr_diff_limit[2]<<16) |
- (pwr_diff_limit[1]<<8) |
- (pwr_diff_limit[0]);
- write_val = customer_limit + ((index < 2) ? powerbase0[rf] : powerbase1[rf]);
- break;
- default:
- chnlGroup = 0;
- write_val = hal_data->MCSTxPowerLevelOriginalOffset[chnlGroup][j] +
- ((index < 2) ? powerbase0[rf] : powerbase1[rf]);
- break;
- }
-/* 20100427 Joseph: Driver dynamic Tx power shall not affect Tx power. It shall be determined by power training mechanism. */
-/* Currently, we cannot fully disable driver dynamic tx power mechanism because it is referenced by BT coexist mechanism. */
-/* In the future, two mechanism shall be separated from each other and maintained independently. Thanks for Lanhsin's reminder. */
- /* 92d do not need this */
- if (pdmpriv->DynamicTxHighPowerLvl == TxHighPwrLevel_Level1)
- write_val = 0x14141414;
- else if (pdmpriv->DynamicTxHighPowerLvl == TxHighPwrLevel_Level2)
- write_val = 0x00000000;
-
- *(out_val+rf) = write_val;
- }
-}
-
-static void write_ofdm_pwr_reg(struct adapter *adapt, u8 index, u32 *pvalue)
-{
- u16 regoffset_a[6] = { rTxAGC_A_Rate18_06, rTxAGC_A_Rate54_24,
- rTxAGC_A_Mcs03_Mcs00, rTxAGC_A_Mcs07_Mcs04,
- rTxAGC_A_Mcs11_Mcs08, rTxAGC_A_Mcs15_Mcs12 };
- u16 regoffset_b[6] = { rTxAGC_B_Rate18_06, rTxAGC_B_Rate54_24,
- rTxAGC_B_Mcs03_Mcs00, rTxAGC_B_Mcs07_Mcs04,
- rTxAGC_B_Mcs11_Mcs08, rTxAGC_B_Mcs15_Mcs12 };
- u8 i, rf, pwr_val[4];
- u32 write_val;
- u16 regoffset;
-
- for (rf = 0; rf < 2; rf++) {
- write_val = pvalue[rf];
- for (i = 0; i < 4; i++) {
- pwr_val[i] = (u8)((write_val & (0x7f<<(i*8)))>>(i*8));
- if (pwr_val[i] > RF6052_MAX_TX_PWR)
- pwr_val[i] = RF6052_MAX_TX_PWR;
- }
- write_val = (pwr_val[3]<<24) | (pwr_val[2]<<16) |
- (pwr_val[1]<<8) | pwr_val[0];
-
- if (rf == 0)
- regoffset = regoffset_a[index];
- else
- regoffset = regoffset_b[index];
-
- phy_set_bb_reg(adapt, regoffset, bMaskDWord, write_val);
- }
-}
-
-void rtl88eu_phy_rf6052_set_ofdm_txpower(struct adapter *adapt,
- u8 *pwr_level_ofdm,
- u8 *pwr_level_bw20,
- u8 *pwr_level_bw40, u8 channel)
-{
- struct hal_data_8188e *hal_data = GET_HAL_DATA(adapt);
- u32 write_val[2], powerbase0[2], powerbase1[2], pwrtrac_value;
- u8 direction;
- u8 index = 0;
-
- getpowerbase88e(adapt, pwr_level_ofdm, pwr_level_bw20, pwr_level_bw40,
- channel, &powerbase0[0], &powerbase1[0]);
-
- ODM_TxPwrTrackAdjust88E(&hal_data->odmpriv, 0, &direction, &pwrtrac_value);
-
- for (index = 0; index < 6; index++) {
- get_rx_power_val_by_reg(adapt, channel, index,
- &powerbase0[0], &powerbase1[0],
- &write_val[0]);
-
- if (direction == 1) {
- write_val[0] += pwrtrac_value;
- write_val[1] += pwrtrac_value;
- } else if (direction == 2) {
- write_val[0] -= pwrtrac_value;
- write_val[1] -= pwrtrac_value;
- }
- write_ofdm_pwr_reg(adapt, index, &write_val[0]);
- }
-}
--
1.7.10.4
^ permalink raw reply [flat|nested] 9+ messages in thread* [PATCH 9/9] staging: rtl8188eu: Remove unused function SetBcnCtrlReg()
2014-08-31 8:38 [PATCH 1/9] staging: rtl8188eu: Rework function rtl8188e_PHY_RF6052SetBandwidth() navin patidar
` (6 preceding siblings ...)
2014-08-31 8:38 ` [PATCH 8/9] staging: rtl8188eu: Rename rtl8188e_rf6052.c to rf.c navin patidar
@ 2014-08-31 8:38 ` navin patidar
7 siblings, 0 replies; 9+ messages in thread
From: navin patidar @ 2014-08-31 8:38 UTC (permalink / raw)
To: gregkh; +Cc: Larry.Finger, devel, linux-kernel, navin patidar
Signed-off-by: navin patidar <navin.patidar@gmail.com>
---
drivers/staging/rtl8188eu/hal/rtl8188e_hal_init.c | 18 ------------------
drivers/staging/rtl8188eu/include/rtl8188e_hal.h | 1 -
2 files changed, 19 deletions(-)
diff --git a/drivers/staging/rtl8188eu/hal/rtl8188e_hal_init.c b/drivers/staging/rtl8188eu/hal/rtl8188e_hal_init.c
index 7a8fe53..d6fe5e6 100644
--- a/drivers/staging/rtl8188eu/hal/rtl8188e_hal_init.c
+++ b/drivers/staging/rtl8188eu/hal/rtl8188e_hal_init.c
@@ -704,21 +704,3 @@ void Hal_ReadThermalMeter_88E(struct adapter *Adapter, u8 *PROMContent, bool Aut
}
DBG_88E("ThermalMeter = 0x%x\n", pHalData->EEPROMThermalMeter);
}
-
-/* This function is used only for 92C to set REG_BCN_CTRL(0x550) register. */
-/* We just reserve the value of the register in variable pHalData->RegBcnCtrlVal and then operate */
-/* the value of the register via atomic operation. */
-/* This prevents from race condition when setting this register. */
-/* The value of pHalData->RegBcnCtrlVal is initialized in HwConfigureRTL8192CE() function. */
-
-void SetBcnCtrlReg(struct adapter *padapter, u8 SetBits, u8 ClearBits)
-{
- struct hal_data_8188e *pHalData;
-
- pHalData = GET_HAL_DATA(padapter);
-
- pHalData->RegBcnCtrlVal |= SetBits;
- pHalData->RegBcnCtrlVal &= ~ClearBits;
-
- usb_write8(padapter, REG_BCN_CTRL, (u8)pHalData->RegBcnCtrlVal);
-}
diff --git a/drivers/staging/rtl8188eu/include/rtl8188e_hal.h b/drivers/staging/rtl8188eu/include/rtl8188e_hal.h
index f5abe01..2c517ce 100644
--- a/drivers/staging/rtl8188eu/include/rtl8188e_hal.h
+++ b/drivers/staging/rtl8188eu/include/rtl8188e_hal.h
@@ -417,7 +417,6 @@ void Hal_ReadPowerSavingMode88E(struct adapter *pAdapter, u8 *hwinfo,
void rtl8188e_set_hal_ops(struct hal_ops *pHalFunc);
/* register */
-void SetBcnCtrlReg(struct adapter *padapter, u8 SetBits, u8 ClearBits);
void rtl8188e_start_thread(struct adapter *padapter);
void rtl8188e_stop_thread(struct adapter *padapter);
--
1.7.10.4
^ permalink raw reply [flat|nested] 9+ messages in thread