[PATCHv3] pinctrl: baytrail: Clear DIRECT_IRQ bit

[Loic Poulain <loic.poulain@intel.com>]

Direct irq en bit should be cleared for pads using io mode.
If not, the io based irq will never be detected.
However, this bit can sometimes be misconfigured (BIOS issue).
Force clearing of this bit in io mode and trigger a WARN.

Signed-off-by: Loic Poulain <loic.poulain@intel.com>
---
 v2: Apply over ff998356b644ebe723127bd9eec6040b59a4a4f6 + add Warning
 v3: Update commit message & warn message

 drivers/pinctrl/pinctrl-baytrail.c | 6 +++++-
 1 file changed, 5 insertions(+), 1 deletion(-)

diff --git a/drivers/pinctrl/pinctrl-baytrail.c b/drivers/pinctrl/pinctrl-baytrail.c
index 701a646..d1e9484 100644
--- a/drivers/pinctrl/pinctrl-baytrail.c
+++ b/drivers/pinctrl/pinctrl-baytrail.c
@@ -230,10 +230,14 @@ static int byt_irq_type(struct irq_data *d, unsigned type)
 	spin_lock_irqsave(&vg->lock, flags);
 	value = readl(reg);

+	WARN(value & BYT_DIRECT_IRQ_EN,
+		"Bad pad config for io mode, force direct_irq_en bit clearing");
+
 	/* For level trigges the BYT_TRIG_POS and BYT_TRIG_NEG bits
 	 * are used to indicate high and low level triggering
 	 */
-	value &= ~(BYT_TRIG_POS | BYT_TRIG_NEG | BYT_TRIG_LVL);
+	value &= ~(BYT_DIRECT_IRQ_EN | BYT_TRIG_POS | BYT_TRIG_NEG |
+		   BYT_TRIG_LVL);

 	switch (type) {
 	case IRQ_TYPE_LEVEL_HIGH:
--
1.8.3.2