From: Marc Zyngier <marc.zyngier@arm.com>
To: linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org,
Jiang Liu <jiang.liu@linux.intel.com>,
Thomas Gleixner <tglx@linutronix.de>
Cc: Bjorn Helgaas <bhelgaas@google.com>,
Yingjoe Chen <yingjoe.chen@mediatek.com>,
Will Deacon <will.deacon@arm.com>,
Catalin marinas <catalin.marinas@arm.com>,
Mark Rutland <mark.rutland@arm.com>
Subject: [PATCH 02/15] PCI/MSI: genirq: allow architecture-specific override of flow handler
Date: Tue, 11 Nov 2014 15:48:00 +0000 [thread overview]
Message-ID: <1415720893-13371-3-git-send-email-marc.zyngier@arm.com> (raw)
In-Reply-To: <1415720893-13371-1-git-send-email-marc.zyngier@arm.com>
ARM interrupt controllers tend to use a "fasteoi" handler rather than
the expected "edge". Allow the architecture to override the function
call setting up the flow handler by defining arch_msi_irq_set_handler.
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
---
drivers/pci/msi.c | 7 ++++++-
1 file changed, 6 insertions(+), 1 deletion(-)
diff --git a/drivers/pci/msi.c b/drivers/pci/msi.c
index 8de7c87..6fea997 100644
--- a/drivers/pci/msi.c
+++ b/drivers/pci/msi.c
@@ -1113,6 +1113,11 @@ msi_get_hwirq(struct pci_dev *dev, struct msi_desc *desc)
(pci_domain_nr(dev->bus) & 0xFFFFFFFF) << 27;
}
+void __weak arch_msi_irq_set_handler(unsigned int virq)
+{
+ __irq_set_handler(virq, handle_edge_irq, 0, "edge");
+}
+
static int msi_domain_alloc(struct irq_domain *domain, unsigned int virq,
unsigned int nr_irqs, void *arg)
{
@@ -1130,7 +1135,7 @@ static int msi_domain_alloc(struct irq_domain *domain, unsigned int virq,
irq_domain_set_hwirq_and_chip(domain, virq + i, hwirq + i,
domain->host_data,
(void *)(long)i);
- __irq_set_handler(virq + i, handle_edge_irq, 0, "edge");
+ arch_msi_irq_set_handler(virq + i);
}
return ret;
--
2.0.4
next prev parent reply other threads:[~2014-11-11 15:48 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-11-11 15:47 [PATCH 00/15] arm64: PCI/MSI: GICv3 ITS support (stacked domain edition) Marc Zyngier
2014-11-11 15:47 ` [PATCH 01/15] genirq: Add a few more helper funtions to support stacked irq_chip Marc Zyngier
2014-11-11 15:48 ` Marc Zyngier [this message]
2014-11-11 15:48 ` [PATCH 03/15] arm64: MSI: Add support for stacked MSI domain Marc Zyngier
2014-11-11 15:48 ` [PATCH 04/15] irqchip: GICv3: Convert to domain hierarchy Marc Zyngier
2014-11-11 15:48 ` [PATCH 05/15] irqchip: GICv3: rework redistributor structure Marc Zyngier
2014-11-11 15:48 ` [PATCH 06/15] irqchip: GICv3: ITS command queue Marc Zyngier
2014-11-11 15:48 ` [PATCH 07/15] irqchip: GICv3: ITS: irqchip implementation Marc Zyngier
2014-11-11 15:48 ` [PATCH 08/15] irqchip: GICv3: ITS: LPI allocator Marc Zyngier
2014-11-11 15:48 ` [PATCH 09/15] irqchip: GICv3: ITS: tables allocators Marc Zyngier
2014-11-11 15:48 ` [PATCH 10/15] irqchip: GICv3: ITS: device allocation and configuration Marc Zyngier
2014-11-11 15:48 ` [PATCH 11/15] irqchip: GICv3: ITS: MSI support Marc Zyngier
2014-11-11 15:48 ` [PATCH 12/15] irqchip: GICv3: ITS: DT probing and initialization Marc Zyngier
2014-11-11 15:48 ` [PATCH 13/15] irqchip: GICv3: ITS: plug ITS init into main GICv3 code Marc Zyngier
2014-11-11 15:48 ` [PATCH 14/15] irqchip: GICv3: ITS: enable compilation of the ITS driver Marc Zyngier
2014-11-11 15:48 ` [PATCH 15/15] irqchip: GICv3: Binding updates for ITS Marc Zyngier
2014-11-11 16:10 ` [PATCH 00/15] arm64: PCI/MSI: GICv3 ITS support (stacked domain edition) Jiang Liu
2014-11-11 16:27 ` Marc Zyngier
2014-11-11 16:32 ` Jiang Liu
2014-11-11 18:32 ` Marc Zyngier
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