* [PATCH v4 2/5] Documentation: bindings: add doc for the Rockchip usb PHY
@ 2014-12-09 2:48 Yunzhi Li
2014-12-09 14:42 ` Romain Perier
0 siblings, 1 reply; 2+ messages in thread
From: Yunzhi Li @ 2014-12-09 2:48 UTC (permalink / raw)
To: robh+dt, pawel.moll, mark.rutland, ijc+devicetree, galak, lyz,
devicetree, linux-kernel, linux-rockchip
Document the bindings of the Rockchip usb PHY driver.
Signed-off-by: Yunzhi Li <lyz@rock-chips.com>
---
Changes in v4:
- Updata description for phy device tree subnode.
Changes in v3: None
.../devicetree/bindings/phy/rockchip-usb-phy.txt | 32 ++++++++++++++++++++++
1 file changed, 32 insertions(+)
create mode 100644 Documentation/devicetree/bindings/phy/rockchip-usb-phy.txt
diff --git a/Documentation/devicetree/bindings/phy/rockchip-usb-phy.txt b/Documentation/devicetree/bindings/phy/rockchip-usb-phy.txt
new file mode 100644
index 0000000..0b725e4
--- /dev/null
+++ b/Documentation/devicetree/bindings/phy/rockchip-usb-phy.txt
@@ -0,0 +1,32 @@
+ROCKCHIP USB2 PHY
+
+Required properties:
+ - compatible: rockchip,rk3288-usb-phy
+ - rockchip,grf : phandle to the syscon managing the "general
+ register files"
+ - #phy-cells: should be 1
+ - #address-cells: should be 1
+ - #size-cells: should be 0
+
+Sub-nodes:
+Each PHY should be represented as a sub-node.
+
+Sub-nodes
+required properties:
+- reg: the PHY number
+ "0" - PHY connect to OTG controller
+ "1" - PHY connect to HOST0 controller
+ "2" - PHY connect to HOST1 controller
+
+Optional Properties:
+- clocks : phandle + clock specifier for the phy clocks
+
+Example:
+
+usbphy: phy {
+ #phy-cells = <1>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "rockchip,rk3288-usb-phy";
+ rockchip,grf = <&grf>;
+};
--
2.0.0
^ permalink raw reply [flat|nested] 2+ messages in thread
* Re: [PATCH v4 2/5] Documentation: bindings: add doc for the Rockchip usb PHY
2014-12-09 2:48 [PATCH v4 2/5] Documentation: bindings: add doc for the Rockchip usb PHY Yunzhi Li
@ 2014-12-09 14:42 ` Romain Perier
0 siblings, 0 replies; 2+ messages in thread
From: Romain Perier @ 2014-12-09 14:42 UTC (permalink / raw)
To: Yunzhi Li
Cc: Rob Herring, pawel.moll, Mark Rutland, ijc+devicetree,
Kumar Gala, devicetree, Linux Kernel Mailing List,
linux-rockchip
Hi,
2014-12-09 3:48 GMT+01:00 Yunzhi Li <lyz@rock-chips.com>:
> Document the bindings of the Rockchip usb PHY driver.
Long description is the same than the short one.. So either the long
description is useless
or it can be improved.
>
> +Required properties:
> + - compatible: rockchip,rk3288-usb-phy
> + - rockchip,grf : phandle to the syscon managing the "general
> + register files"
> + - #phy-cells: should be 1
> + - #address-cells: should be 1
> + - #size-cells: should be 0
> +
> +Sub-nodes:
> +Each PHY should be represented as a sub-node.
> +
> +Sub-nodes
> +required properties:
> +- reg: the PHY number
> + "0" - PHY connect to OTG controller
> + "1" - PHY connect to HOST0 controller
> + "2" - PHY connect to HOST1 controller
> +
> +Optional Properties:
> +- clocks : phandle + clock specifier for the phy clocks
> +
> +Example:
> +
> +usbphy: phy {
> + #phy-cells = <1>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> + compatible = "rockchip,rk3288-usb-phy";
> + rockchip,grf = <&grf>;
> +};
Could you reorder these properties to have the same order than in the
"required properties" ? Something like:
usbphy: phy {
compatible = "rockchip,rk3288-usb-phy";
rockchip,grf = <&grf>;
#phy-cells = <1>;
#address-cells = <1>;
#size-cells = <0>;
};
Thanks,
Romain
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