From: Andrzej Hajda <a.hajda@samsung.com>
To: Kukjin Kim <kgene@kernel.org>
Cc: Andrzej Hajda <a.hajda@samsung.com>,
Marek Szyprowski <m.szyprowski@samsung.com>,
Kyungmin Park <kyungmin.park@samsung.com>,
javier.martinez@collabora.co.uk, Liquid.Acid@gmx.net,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
dri-devel@lists.freedesktop.org,
linux-samsung-soc@vger.kernel.org,
linux-arm-kernel@lists.infradead.org
Subject: [PATCH v2 RESEND 4/4] ARM: dts: exynos5420: add async-bridge clocks to gsc power domain
Date: Thu, 12 Mar 2015 14:37:11 +0100 [thread overview]
Message-ID: <1426167431-24470-5-git-send-email-a.hajda@samsung.com> (raw)
In-Reply-To: <1426167431-24470-1-git-send-email-a.hajda@samsung.com>
Both GSCALER IPs in gsc power domain have async-bridges (to FIMD and MIXER),
therefore their clocks should be enabled during power domain switch.
Signed-off-by: Andrzej Hajda <a.hajda@samsung.com>
Reviewed-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk>
Tested-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk>
---
arch/arm/boot/dts/exynos5420.dtsi | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm/boot/dts/exynos5420.dtsi b/arch/arm/boot/dts/exynos5420.dtsi
index 55e3887..4eaeabe 100644
--- a/arch/arm/boot/dts/exynos5420.dtsi
+++ b/arch/arm/boot/dts/exynos5420.dtsi
@@ -251,6 +251,8 @@
compatible = "samsung,exynos4210-pd";
reg = <0x10044000 0x20>;
#power-domain-cells = <0>;
+ clocks = <&clock CLK_GSCL0>, <&clock CLK_GSCL1>;
+ clock-names = "asb0", "asb1";
};
isp_pd: power-domain@10044020 {
--
1.9.1
next prev parent reply other threads:[~2015-03-12 13:38 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-03-12 13:37 [PATCH v2 RESEND 0/4] Fix power domains handling on exynos542x Andrzej Hajda
2015-03-12 13:37 ` [PATCH v2 RESEND 1/4] arm/exynos: add asynchronous bridge clock bindings Andrzej Hajda
2015-03-12 13:37 ` [PATCH v2 RESEND 2/4] arm/exynos/pm_domains: add support for async-bridge clocks Andrzej Hajda
2015-03-12 13:37 ` [PATCH v2 RESEND 3/4] ARM: dts: exynos5420: add async-bridge clocks to disp1 power domain Andrzej Hajda
2015-03-12 13:37 ` Andrzej Hajda [this message]
2015-03-17 17:14 ` [PATCH v2 RESEND 0/4] Fix power domains handling on exynos542x Kukjin Kim
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