From: Rhyland Klein <rklein@nvidia.com>
To: Peter De Schrijver <pdeschrijver@nvidia.com>
Cc: Mike Turquette <mturquette@linaro.org>,
Stephen Warren <swarren@wwwdotorg.org>,
Stephen Boyd <sboyd@codeaurora.org>,
Thierry Reding <thierry.reding@gmail.com>,
Alexandre Courbot <gnurou@gmail.com>,
linux-clk@vger.kernel.org, linux-tegra@vger.kernel.org,
linux-kernel@vger.kernel.org, Rhyland Klein <rklein@nvidia.com>
Subject: [PATCH v4 03/20] clk: tegra: pll: add tegra_pll_wait_for_lock to clk header
Date: Mon, 4 May 2015 12:37:23 -0400 [thread overview]
Message-ID: <1430757460-9478-4-git-send-email-rklein@nvidia.com> (raw)
In-Reply-To: <1430757460-9478-1-git-send-email-rklein@nvidia.com>
Create a wrapper interface to make use of the existing
clk_pll_wait_for_lock. This will be useful for implementations
of callbacks in Tegra SoC specific clock drivers.
Signed-off-by: Rhyland Klein <rklein@nvidia.com>
---
drivers/clk/tegra/clk-pll.c | 5 +++++
drivers/clk/tegra/clk.h | 1 +
2 files changed, 6 insertions(+)
diff --git a/drivers/clk/tegra/clk-pll.c b/drivers/clk/tegra/clk-pll.c
index 05c6d08a6695..b9a739ce4b98 100644
--- a/drivers/clk/tegra/clk-pll.c
+++ b/drivers/clk/tegra/clk-pll.c
@@ -269,6 +269,11 @@ static int clk_pll_wait_for_lock(struct tegra_clk_pll *pll)
return -1;
}
+int tegra_pll_wait_for_lock(struct tegra_clk_pll *pll)
+{
+ return clk_pll_wait_for_lock(pll);
+}
+
static int clk_pll_is_enabled(struct clk_hw *hw)
{
struct tegra_clk_pll *pll = to_clk_pll(hw);
diff --git a/drivers/clk/tegra/clk.h b/drivers/clk/tegra/clk.h
index dfea6f367977..5759b8bfb80e 100644
--- a/drivers/clk/tegra/clk.h
+++ b/drivers/clk/tegra/clk.h
@@ -647,5 +647,6 @@ void tegra114_clock_deassert_dfll_dvco_reset(void);
typedef void (*tegra_clk_apply_init_table_func)(void);
extern tegra_clk_apply_init_table_func tegra_clk_apply_init_table;
+int tegra_pll_wait_for_lock(struct tegra_clk_pll *pll);
#endif /* TEGRA_CLK_H */
--
1.7.9.5
next prev parent reply other threads:[~2015-05-04 16:39 UTC|newest]
Thread overview: 59+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-05-04 16:37 [PATCH v4 00/20] Tegra210 Clock Support Rhyland Klein
2015-05-04 16:37 ` [PATCH v4 01/20] clk: tegra: Modify tegra_audio_clk_init to accept more plls Rhyland Klein
2015-05-04 18:05 ` Benson Leung
2015-05-07 15:15 ` Thierry Reding
2015-05-07 15:49 ` Rhyland Klein
2015-05-04 16:37 ` [PATCH v4 02/20] clk: tegra: periph: add new periph clks and muxes for Tegra210 Rhyland Klein
2015-05-04 19:45 ` Benson Leung
2015-05-05 20:14 ` Rhyland Klein
2015-05-06 13:59 ` Thierry Reding
2015-05-06 16:24 ` Rhyland Klein
2015-05-04 21:19 ` Andrew Bresticker
2015-05-06 11:20 ` Jim Lin
2015-05-06 14:15 ` Thierry Reding
2015-05-06 16:20 ` Rhyland Klein
2015-05-06 14:12 ` Thierry Reding
2015-05-04 16:37 ` Rhyland Klein [this message]
2015-05-04 16:37 ` [PATCH v4 04/20] clk: tegra: pll: simplify clk_enable_path Rhyland Klein
2015-05-04 20:11 ` Benson Leung
2015-05-04 16:37 ` [PATCH v4 05/20] clk: tegra: pll: update warning msg Rhyland Klein
2015-05-04 20:20 ` Benson Leung
2015-05-04 16:37 ` [PATCH v4 06/20] clk: tegra: pll-params: change misc_reg count from 3 -> 6 Rhyland Klein
2015-05-04 20:35 ` Benson Leung
2015-05-06 14:18 ` Thierry Reding
2015-05-04 16:37 ` [PATCH v4 07/20] clk: tegra: pll: Don't unconditionally set LOCK flags Rhyland Klein
2015-05-04 21:42 ` Benson Leung
2015-05-04 16:37 ` [PATCH v4 08/20] clk: tegra: pll: Add logic for handling SDM data Rhyland Klein
2015-05-04 23:01 ` Benson Leung
2015-05-05 19:16 ` Rhyland Klein
2015-05-06 13:57 ` Thierry Reding
2015-05-06 16:16 ` Rhyland Klein
2015-05-04 16:37 ` [PATCH v4 09/20] clk: tegra: pll: Add logic for SS Rhyland Klein
2015-05-04 23:11 ` Benson Leung
2015-05-05 20:15 ` Rhyland Klein
2015-05-04 16:37 ` [PATCH v4 10/20] clk: tegra: pll: Add logic for out-of-table rates for T210 Rhyland Klein
2015-05-04 23:34 ` Benson Leung
2015-05-05 19:55 ` Rhyland Klein
2015-05-04 16:37 ` [PATCH v4 11/20] clk: tegra: pll: Add code to handle if resets are supported by PLL Rhyland Klein
2015-05-05 17:15 ` Benson Leung
2015-05-04 16:37 ` [PATCH v4 12/20] clk: tegra: pll: Add specialized logic for T210 Rhyland Klein
2015-05-07 15:11 ` Thierry Reding
2015-05-04 16:37 ` [PATCH v4 13/20] clk: tegra: pll: Add support for PLLMB " Rhyland Klein
2015-05-04 16:37 ` [PATCH v4 14/20] clk: tegra: pll: Adjust vco_min if SDM present Rhyland Klein
2015-05-04 16:37 ` [PATCH v4 15/20] clk: tegra: pll: Add dyn_ramp callback Rhyland Klein
2015-05-04 16:37 ` [PATCH v4 16/20] clk: tegra: pll: Add Set_default logic Rhyland Klein
2015-05-04 16:37 ` [PATCH v4 17/20] clk: tegra: pll: Fix _pll_ramp_calc_pll logic and _calc_dynamic_ramp_rate Rhyland Klein
2015-05-04 16:37 ` [PATCH v4 18/20] clk: tegra: Add Super Gen5 Logic Rhyland Klein
2015-05-04 16:37 ` [PATCH v4 19/20] clk: tegra210: add support for Tegra210 clocks Rhyland Klein
2015-05-06 14:51 ` Thierry Reding
2015-05-06 16:18 ` Rhyland Klein
2015-05-06 17:21 ` Rhyland Klein
2015-05-07 15:16 ` Thierry Reding
2015-05-07 10:39 ` Jim Lin
2015-05-07 16:07 ` Rhyland Klein
2015-05-07 15:18 ` Thierry Reding
2015-05-04 16:37 ` [PATCH v4 20/20] clk: tegra: pll: Fix issues with rates for VCO PLLs Rhyland Klein
2015-05-05 13:14 ` [PATCH v4 00/20] Tegra210 Clock Support Thierry Reding
2015-05-05 15:55 ` Rhyland Klein
2015-05-06 13:37 ` Thierry Reding
2015-05-06 16:10 ` Rhyland Klein
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