From: Ezequiel Garcia <ezequiel.garcia@imgtec.com>
To: <linux-kernel@vger.kernel.org>, <linux-mips@linux-mips.org>,
"Daniel Lezcano" <daniel.lezcano@linaro.org>,
<devicetree@vger.kernel.org>
Cc: Andrew Bresticker <abrestic@chromium.org>,
James Hartley <james.hartley@imgtec.com>,
James Hogan <james.hogan@imgtec.com>,
"Thomas Gleixner" <tglx@linutronix.de>,
<Damien.Horsley@imgtec.com>, <Govindraj.Raja@imgtec.com>,
Ezequiel Garcia <ezequiel.garcia@imgtec.com>
Subject: [PATCH 5/7] clocksource: Add Pistachio SoC general purpose timer binding document
Date: Thu, 21 May 2015 18:41:05 -0300 [thread overview]
Message-ID: <1432244465-15313-1-git-send-email-ezequiel.garcia@imgtec.com> (raw)
In-Reply-To: <1432244260-14908-1-git-send-email-ezequiel.garcia@imgtec.com>
Add a device-tree binding document for the clocksource driver provided
by Pistachio SoC general purpose timers.
Signed-off-by: Ezequiel Garcia <ezequiel.garcia@imgtec.com>
---
.../bindings/timer/img,pistachio-gptimer.txt | 29 ++++++++++++++++++++++
1 file changed, 29 insertions(+)
create mode 100644 Documentation/devicetree/bindings/timer/img,pistachio-gptimer.txt
diff --git a/Documentation/devicetree/bindings/timer/img,pistachio-gptimer.txt b/Documentation/devicetree/bindings/timer/img,pistachio-gptimer.txt
new file mode 100644
index 0000000..f1b7c08
--- /dev/null
+++ b/Documentation/devicetree/bindings/timer/img,pistachio-gptimer.txt
@@ -0,0 +1,29 @@
+* Pistachio general-purpose timer based clocksource
+
+Required properties:
+ - compatible: "img,pistachio-gptimer".
+ - reg: Address range of the timer registers.
+ - interrupts: An interrupt for each of the four timers
+ - clocks : Should contain a clock specifier for each entry in clock-names
+ - clock-names : Should contain the following entries:
+ "sys", interface clock
+ "slow", slow counter clock
+ "fast", fast counter clock
+ - img,cr-periph: Must contain a phandle to the peripheral control
+ syscon node.
+
+Example:
+ timer: timer@18102000 {
+ compatible = "img,pistachio-gptimer";
+ reg = <0x18102000 0x100>;
+ interrupts = <GIC_SHARED 60 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SHARED 61 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SHARED 62 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SHARED 63 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clk_periph PERIPH_CLK_COUNTER_FAST>,
+ <&clk_periph PERIPH_CLK_COUNTER_SLOW>,
+ <&cr_periph SYS_CLK_TIMER>;
+ clock-names = "fast", "slow", "sys";
+ img,cr-periph = <&cr_periph>;
+ };
+
--
2.3.3
next prev parent reply other threads:[~2015-05-21 21:47 UTC|newest]
Thread overview: 24+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-05-21 21:37 [PATCH 0/7] Clocksource changes for Pistachio CPUFreq Ezequiel Garcia
2015-05-21 21:37 ` [PATCH 1/7] clocksource: mips-gic: Enable the clock before using it Ezequiel Garcia
2015-05-21 22:17 ` Andrew Bresticker
2015-05-21 21:37 ` [PATCH 2/7] clocksource: mips-gic: Add missing error returns checks Ezequiel Garcia
2015-05-21 22:18 ` Andrew Bresticker
2015-05-21 21:37 ` [PATCH 3/7] clocksource: mips-gic: Split clocksource and clockevent initialization Ezequiel Garcia
2015-05-21 22:24 ` Andrew Bresticker
2015-05-21 22:25 ` Ezequiel Garcia
2015-05-22 16:53 ` Andrew Bresticker
2015-05-21 21:37 ` [PATCH 4/7] clocksource: mips-gic: Update clockevent frequency on clock rate changes Ezequiel Garcia
2015-05-21 22:32 ` Andrew Bresticker
2015-05-21 22:30 ` Ezequiel Garcia
2015-05-21 21:41 ` Ezequiel Garcia [this message]
2015-05-21 23:41 ` [PATCH 5/7] clocksource: Add Pistachio SoC general purpose timer binding document Andrew Bresticker
2015-05-21 21:41 ` [PATCH 6/7] clocksource: Add Pistachio clocksource-only driver Ezequiel Garcia
2015-05-21 22:00 ` Thomas Gleixner
2015-05-21 22:02 ` Ezequiel Garcia
2015-05-21 22:09 ` Thomas Gleixner
2015-05-22 16:48 ` Andrew Bresticker
2015-05-26 14:16 ` Ezequiel Garcia
2015-05-21 21:43 ` [PATCH 7/7] mips: pistachio: Allow to enable the external timer based clocksource Ezequiel Garcia
2015-05-22 16:50 ` Andrew Bresticker
2015-05-22 16:58 ` James Hartley
2015-05-22 18:08 ` Ezequiel Garcia
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