From: Paul Burton <paul.burton@imgtec.com>
To: <linux-mips@linux-mips.org>
Cc: Paul Burton <paul.burton@imgtec.com>,
Marc Zyngier <marc.zyngier@arm.com>,
Jason Cooper <jason@lakedaemon.net>,
Thomas Gleixner <tglx@linutronix.de>,
<linux-kernel@vger.kernel.org>
Subject: [PATCH 2/3] irqchip: mips-gic: convert CPU numbers to VP IDs
Date: Tue, 22 Sep 2015 11:29:10 -0700 [thread overview]
Message-ID: <1442946551-27893-3-git-send-email-paul.burton@imgtec.com> (raw)
In-Reply-To: <1442946551-27893-1-git-send-email-paul.burton@imgtec.com>
Make use of the mips_cm_vp_id function to convert from Linux CPU numbers
to the VP IDs used by hardware, which are not identical in all systems.
Without doing so we map interrupts to incorrect VP(E)s.
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
---
drivers/irqchip/irq-mips-gic.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/irqchip/irq-mips-gic.c b/drivers/irqchip/irq-mips-gic.c
index af2f16b..842a53d 100644
--- a/drivers/irqchip/irq-mips-gic.c
+++ b/drivers/irqchip/irq-mips-gic.c
@@ -426,7 +426,7 @@ static int gic_set_affinity(struct irq_data *d, const struct cpumask *cpumask,
spin_lock_irqsave(&gic_lock, flags);
/* Re-route this IRQ */
- gic_map_to_vpe(irq, cpumask_first(&tmp));
+ gic_map_to_vpe(irq, mips_cm_vp_id(cpumask_first(&tmp)));
/* Update the pcpu_masks */
for (i = 0; i < NR_CPUS; i++)
@@ -599,7 +599,7 @@ static __init void gic_ipi_init_one(unsigned int intr, int cpu,
GIC_SHARED_TO_HWIRQ(intr));
int i;
- gic_map_to_vpe(intr, cpu);
+ gic_map_to_vpe(intr, mips_cm_vp_id(cpu));
for (i = 0; i < NR_CPUS; i++)
clear_bit(intr, pcpu_masks[i].pcpu_mask);
set_bit(intr, pcpu_masks[cpu].pcpu_mask);
--
2.5.3
next prev parent reply other threads:[~2015-09-22 18:30 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-09-22 18:29 [PATCH 0/3] MIPS GIC fixes Paul Burton
2015-09-22 18:29 ` [PATCH 1/3] MIPS: CM: provide a function to map from CPU to VP ID Paul Burton
2015-09-22 18:29 ` Paul Burton [this message]
2015-09-22 18:29 ` [PATCH 3/3] irqchip: mips-gic: fix pending & mask reads for MIPS64 with 32b GIC Paul Burton
2015-09-22 19:07 ` [PATCH 0/3] MIPS GIC fixes Thomas Gleixner
2015-09-22 19:14 ` Paul Burton
2015-09-22 19:32 ` Thomas Gleixner
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=1442946551-27893-3-git-send-email-paul.burton@imgtec.com \
--to=paul.burton@imgtec.com \
--cc=jason@lakedaemon.net \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-mips@linux-mips.org \
--cc=marc.zyngier@arm.com \
--cc=tglx@linutronix.de \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox
all inboxes | Powered by JetHome®