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From: Thomas Gleixner <tglx@linutronix.de>
To: Paul Burton <paul.burton@imgtec.com>
Cc: linux-mips@linux-mips.org, linux-kernel@vger.kernel.org,
	Jason Cooper <jason@lakedaemon.net>,
	James Hogan <james.hogan@imgtec.com>,
	Markos Chandras <markos.chandras@imgtec.com>,
	Ralf Baechle <ralf@linux-mips.org>,
	Marc Zyngier <marc.zyngier@arm.com>
Subject: Re: [PATCH 0/3] MIPS GIC fixes
Date: Tue, 22 Sep 2015 21:07:15 +0200 (CEST)	[thread overview]
Message-ID: <alpine.DEB.2.11.1509222106100.5606@nanos> (raw)
In-Reply-To: <1442946551-27893-1-git-send-email-paul.burton@imgtec.com>

On Tue, 22 Sep 2015, Paul Burton wrote:

> This series fixes a couple of problems with the MIPS GIC support,
> impacting systems with the 64 bit CM3 and those with multithreading and
> non-contiguous numbering for VP(E)s across cores.
> 
> Paul Burton (3):
>   MIPS: CM: provide a function to map from CPU to VP ID
>   irqchip: mips-gic: convert CPU numbers to VP IDs
>   irqchip: mips-gic: fix pending & mask reads for MIPS64 with 32b GIC

I assume that's a bugfix scheduled for 4.3.

Ralf, if so, please ship it through the MIPS tree with my Acked-by for
the irqchip parts.

Thanks,

	tglx



  parent reply	other threads:[~2015-09-22 19:08 UTC|newest]

Thread overview: 7+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-09-22 18:29 Paul Burton
2015-09-22 18:29 ` [PATCH 1/3] MIPS: CM: provide a function to map from CPU to VP ID Paul Burton
2015-09-22 18:29 ` [PATCH 2/3] irqchip: mips-gic: convert CPU numbers to VP IDs Paul Burton
2015-09-22 18:29 ` [PATCH 3/3] irqchip: mips-gic: fix pending & mask reads for MIPS64 with 32b GIC Paul Burton
2015-09-22 19:07 ` Thomas Gleixner [this message]
2015-09-22 19:14   ` [PATCH 0/3] MIPS GIC fixes Paul Burton
2015-09-22 19:32     ` Thomas Gleixner

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