From: Mika Westerberg <mika.westerberg@linux.intel.com>
To: Thomas Gleixner <tglx@linutronix.de>
Cc: Ingo Molnar <mingo@redhat.com>, "H. Peter Anvin" <hpa@zytor.com>,
Jiang Liu <jiang.liu@linux.intel.com>,
Mika Westerberg <mika.westerberg@linux.intel.com>,
linux-kernel@vger.kernel.org
Subject: [PATCH 2/2] x86/irq: Take chained interrupts into account in fixup_irqs()
Date: Fri, 2 Oct 2015 09:57:32 +0300 [thread overview]
Message-ID: <1443769052-21151-2-git-send-email-mika.westerberg@linux.intel.com> (raw)
In-Reply-To: <1443769052-21151-1-git-send-email-mika.westerberg@linux.intel.com>
When a CPU is offlined all interrupts that have action are migrated to
other still online CPUs. However, if the interrupt has chained handler
installed this is not done. Chained handlers are used by GPIO drivers which
support interrupts, for instance.
When affinity is not corrected properly we end up in situation where some
interrupts are not arriving to the online CPUs anymore. For example on
Intel Braswell system which has SD-card card detection signal connected to
a GPIO the IO-APIC routing entries look like below after CPU1 put offline:
pin30, enabled , level, low , V(52), IRR(0), S(0), logical , D(03), M(1)
pin31, enabled , level, low , V(42), IRR(0), S(0), logical , D(03), M(1)
pin32, enabled , level, low , V(62), IRR(0), S(0), logical , D(03), M(1)
pin5b, enabled , level, low , V(72), IRR(0), S(0), logical , D(03), M(1)
The problem here is that the destination mask still contains both CPUs even
if CPU1 is already offline. This means that the IO-APIC still routes
interrupts to the other CPU as well.
Fix this by correcting affinity also for interrupts that have chained
handler installed.
Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>
---
Discussion about the issue can be read here:
https://lkml.org/lkml/2015/10/1/554
arch/x86/kernel/irq.c | 6 +++++-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/arch/x86/kernel/irq.c b/arch/x86/kernel/irq.c
index f8062aaf5df9..e7cc9f199350 100644
--- a/arch/x86/kernel/irq.c
+++ b/arch/x86/kernel/irq.c
@@ -440,6 +440,7 @@ void fixup_irqs(void)
int break_affinity = 0;
int set_affinity = 1;
const struct cpumask *affinity;
+ bool has_user;
if (!desc)
continue;
@@ -451,7 +452,10 @@ void fixup_irqs(void)
data = irq_desc_get_irq_data(desc);
affinity = irq_data_get_affinity_mask(data);
- if (!irq_has_action(irq) || irqd_is_per_cpu(data) ||
+
+ has_user = irq_has_action(irq) || irq_has_chained_handler(irq);
+
+ if (!has_user || irqd_is_per_cpu(data) ||
cpumask_subset(affinity, cpu_online_mask)) {
raw_spin_unlock(&desc->lock);
continue;
--
2.5.1
next prev parent reply other threads:[~2015-10-02 6:58 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-10-02 6:57 [PATCH 1/2] genirq: Introduce a new flag IRQ_IS_CHAINED for chained interrupts Mika Westerberg
2015-10-02 6:57 ` Mika Westerberg [this message]
2015-10-02 20:16 ` Thomas Gleixner
2015-10-05 10:12 ` [PATCH v2] genirq: Allow migration of chained interrupts by installing default action Mika Westerberg
2015-10-09 20:54 ` [tip:irq/core] " tip-bot for Mika Westerberg
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