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From: Jinjie Ruan <ruanjinjie@huawei.com>
To: Ben Horgan <ben.horgan@arm.com>
Cc: <amitsinght@marvell.com>, <baisheng.gao@unisoc.com>,
	<baolin.wang@linux.alibaba.com>, <carl@os.amperecomputing.com>,
	<dave.martin@arm.com>, <david@kernel.org>,
	<dfustini@baylibre.com>, <fenghuay@nvidia.com>,
	<gshan@redhat.com>, <james.morse@arm.com>,
	<jonathan.cameron@huawei.com>, <kobak@nvidia.com>,
	<lcherian@marvell.com>, <linux-arm-kernel@lists.infradead.org>,
	<linux-kernel@vger.kernel.org>, <peternewman@google.com>,
	<punit.agrawal@oss.qualcomm.com>, <quic_jiles@quicinc.com>,
	<reinette.chatre@intel.com>, <rohit.mathew@arm.com>,
	<scott@os.amperecomputing.com>, <sdonthineni@nvidia.com>,
	<tan.shaopeng@fujitsu.com>, <xhao@linux.alibaba.com>,
	<catalin.marinas@arm.com>, <will@kernel.org>, <corbet@lwn.net>,
	<maz@kernel.org>, <oupton@kernel.org>, <joey.gouly@arm.com>,
	<suzuki.poulose@arm.com>, <kvmarm@lists.linux.dev>,
	<zengheng4@huawei.com>, <linux-doc@vger.kernel.org>,
	Shaopeng Tan <tan.shaopeng@jp.fujitsu.com>
Subject: Re: [PATCH v6 06/40] arm64: mpam: Context switch the MPAM registers
Date: Thu, 5 Nov 2026 20:20:47 +0800	[thread overview]
Message-ID: <145b3c09-ff33-4fd7-935a-fa4f4c3c07b2@huawei.com> (raw)
In-Reply-To: <20260313144617.3420416-7-ben.horgan@arm.com>



在 2026/3/13 22:45, Ben Horgan 写道:
> From: James Morse <james.morse@arm.com>
> 
> MPAM allows traffic in the SoC to be labeled by the OS, these labels are
> used to apply policy in caches and bandwidth regulators, and to monitor
> traffic in the SoC. The label is made up of a PARTID and PMG value. The x86
> equivalent calls these CLOSID and RMID, but they don't map precisely.
> 
> MPAM has two CPU system registers that is used to hold the PARTID and PMG
> values that traffic generated at each exception level will use. These can
> be set per-task by the resctrl file system. (resctrl is the defacto
> interface for controlling this stuff).
> 
> Add a helper to switch this.
> 
> struct task_struct's separate CLOSID and RMID fields are insufficient to
> implement resctrl using MPAM, as resctrl can change the PARTID (CLOSID) and
> PMG (sort of like the RMID) separately. On x86, the rmid is an independent
> number, so a race that writes a mismatched closid and rmid into hardware is
> benign. On arm64, the pmg bits extend the partid.
> (i.e. partid-5 has a pmg-0 that is not the same as partid-6's pmg-0).  In
> this case, mismatching the values will 'dirty' a pmg value that resctrl
> believes is clean, and is not tracking with its 'limbo' code.
> 
> To avoid this, the partid and pmg are always read and written as a
> pair. This requires a new u64 field. In struct task_struct there are two
> u32, rmid and closid for the x86 case, but as we can't use them here do
> something else. Add this new field, mpam_partid_pmg, to struct thread_info
> to avoid adding more architecture specific code to struct task_struct.
> Always use READ_ONCE()/WRITE_ONCE() when accessing this field.
> 
> Resctrl allows a per-cpu 'default' value to be set, this overrides the
> values when scheduling a task in the default control-group, which has
> PARTID 0. The way 'code data prioritisation' gets emulated means the
> register value for the default group needs to be a variable.
> 
> The current system register value is kept in a per-cpu variable to avoid
> writing to the system register if the value isn't going to change.  Writes
> to this register may reset the hardware state for regulating bandwidth.
> 
> Finally, there is no reason to context switch these registers unless there
> is a driver changing the values in struct task_struct. Hide the whole thing
> behind a static key. This also allows the driver to disable MPAM in
> response to errors reported by hardware. Move the existing static key to
> belong to the arch code, as in the future the MPAM driver may become a
> loadable module.
> 
> All this should depend on whether there is an MPAM driver, hide it behind
> CONFIG_ARM64_MPAM.
> 
> Tested-by: Gavin Shan <gshan@redhat.com>
> Tested-by: Shaopeng Tan <tan.shaopeng@jp.fujitsu.com>
> Tested-by: Peter Newman <peternewman@google.com>
> Tested-by: Zeng Heng <zengheng4@huawei.com>
> Tested-by: Punit Agrawal <punit.agrawal@oss.qualcomm.com>
> CC: Amit Singh Tomar <amitsinght@marvell.com>
> Reviewed-by: Zeng Heng <zengheng4@huawei.com>
> Reviewed-by: Shaopeng Tan <tan.shaopeng@jp.fujitsu.com>
> Reviewed-by: Jonathan Cameron <jonathan.cameron@huawei.com>
> Reviewed-by: Gavin Shan <gshan@redhat.com>
> Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
> Signed-off-by: James Morse <james.morse@arm.com>
> Signed-off-by: Ben Horgan <ben.horgan@arm.com>
> ---
> Changes since rfc:
> CONFIG_MPAM -> CONFIG_ARM64_MPAM in commit message
> Remove extra DECLARE_STATIC_KEY_FALSE
> Function name in comment, __mpam_sched_in() -> mpam_thread_switch()
> Remove unused headers
> Expand comment (Jonathan)
> 
> Changes since v2:
> Tidy up ifdefs
> 
> Changes since v3:
> Always set MPAMEN for MPAM1_EL1 rather than relying on it being read only.
> ---
>  arch/arm64/Kconfig                   |  2 +
>  arch/arm64/include/asm/mpam.h        | 67 ++++++++++++++++++++++++++++
>  arch/arm64/include/asm/thread_info.h |  3 ++
>  arch/arm64/kernel/Makefile           |  1 +
>  arch/arm64/kernel/mpam.c             | 13 ++++++
>  arch/arm64/kernel/process.c          |  7 +++
>  drivers/resctrl/mpam_devices.c       |  2 -
>  drivers/resctrl/mpam_internal.h      |  4 +-
>  8 files changed, 95 insertions(+), 4 deletions(-)
>  create mode 100644 arch/arm64/include/asm/mpam.h
>  create mode 100644 arch/arm64/kernel/mpam.c
> 
> diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig
> index 38dba5f7e4d2..ecaaca13a969 100644
> --- a/arch/arm64/Kconfig
> +++ b/arch/arm64/Kconfig
> @@ -2039,6 +2039,8 @@ config ARM64_MPAM
>  
>  	  MPAM is exposed to user-space via the resctrl pseudo filesystem.
>  
> +	  This option enables the extra context switch code.
> +
>  endmenu # "ARMv8.4 architectural features"
>  
>  menu "ARMv8.5 architectural features"
> diff --git a/arch/arm64/include/asm/mpam.h b/arch/arm64/include/asm/mpam.h
> new file mode 100644
> index 000000000000..0747e0526927
> --- /dev/null
> +++ b/arch/arm64/include/asm/mpam.h
> @@ -0,0 +1,67 @@
> +/* SPDX-License-Identifier: GPL-2.0 */
> +/* Copyright (C) 2025 Arm Ltd. */
> +
> +#ifndef __ASM__MPAM_H
> +#define __ASM__MPAM_H
> +
> +#include <linux/jump_label.h>
> +#include <linux/percpu.h>
> +#include <linux/sched.h>
> +
> +#include <asm/sysreg.h>
> +
> +DECLARE_STATIC_KEY_FALSE(mpam_enabled);
> +DECLARE_PER_CPU(u64, arm64_mpam_default);
> +DECLARE_PER_CPU(u64, arm64_mpam_current);
> +
> +/*
> + * The value of the MPAM0_EL1 sysreg when a task is in resctrl's default group.
> + * This is used by the context switch code to use the resctrl CPU property
> + * instead. The value is modified when CDP is enabled/disabled by mounting
> + * the resctrl filesystem.
> + */
> +extern u64 arm64_mpam_global_default;
> +
> +/*
> + * The resctrl filesystem writes to the partid/pmg values for threads and CPUs,
> + * which may race with reads in mpam_thread_switch(). Ensure only one of the old
> + * or new values are used. Particular care should be taken with the pmg field as
> + * mpam_thread_switch() may read a partid and pmg that don't match, causing this
> + * value to be stored with cache allocations, despite being considered 'free' by
> + * resctrl.
> + */
> +#ifdef CONFIG_ARM64_MPAM
> +static inline u64 mpam_get_regval(struct task_struct *tsk)
> +{
> +	return READ_ONCE(task_thread_info(tsk)->mpam_partid_pmg);
> +}
> +
> +static inline void mpam_thread_switch(struct task_struct *tsk)
> +{
> +	u64 oldregval;
> +	int cpu = smp_processor_id();
> +	u64 regval = mpam_get_regval(tsk);
> +
> +	if (!static_branch_likely(&mpam_enabled))
> +		return;
> +
> +	if (regval == READ_ONCE(arm64_mpam_global_default))
> +		regval = READ_ONCE(per_cpu(arm64_mpam_default, cpu));
> +
> +	oldregval = READ_ONCE(per_cpu(arm64_mpam_current, cpu));
> +	if (oldregval == regval)
> +		return;
> +
> +	write_sysreg_s(regval | MPAM1_EL1_MPAMEN, SYS_MPAM1_EL1);
> +	isb();

Hi, everyone,

We found a problem as below:

In an offline/online co-located setup, MPAM gives the offline group a
smaller MBW share, a softirq serving an online service runs with the
PARTID of the throttled offline task it interrupted and is throttled
with it -- a priority inversion.

Is this a known limitation?

I see the following patchset uses a separate closid for kernel.

https://lore.kernel.org/all/cover.1790867441.git.babu.moger@amd.com/

> +
> +	/* Synchronising the EL0 write is left until the ERET to EL0 */
> +	write_sysreg_s(regval, SYS_MPAM0_EL1);
> +
> +	WRITE_ONCE(per_cpu(arm64_mpam_current, cpu), regval);
> +}
> +#else
> +static inline void mpam_thread_switch(struct task_struct *tsk) {}
> +#endif /* CONFIG_ARM64_MPAM */
> +
> +#endif /* __ASM__MPAM_H */
> diff --git a/arch/arm64/include/asm/thread_info.h b/arch/arm64/include/asm/thread_info.h
> index 7942478e4065..5d7fe3e153c8 100644
> --- a/arch/arm64/include/asm/thread_info.h
> +++ b/arch/arm64/include/asm/thread_info.h
> @@ -41,6 +41,9 @@ struct thread_info {
>  #ifdef CONFIG_SHADOW_CALL_STACK
>  	void			*scs_base;
>  	void			*scs_sp;
> +#endif
> +#ifdef CONFIG_ARM64_MPAM
> +	u64			mpam_partid_pmg;
>  #endif
>  	u32			cpu;
>  };
> diff --git a/arch/arm64/kernel/Makefile b/arch/arm64/kernel/Makefile
> index 76f32e424065..15979f366519 100644
> --- a/arch/arm64/kernel/Makefile
> +++ b/arch/arm64/kernel/Makefile
> @@ -67,6 +67,7 @@ obj-$(CONFIG_CRASH_DUMP)		+= crash_dump.o
>  obj-$(CONFIG_VMCORE_INFO)		+= vmcore_info.o
>  obj-$(CONFIG_ARM_SDE_INTERFACE)		+= sdei.o
>  obj-$(CONFIG_ARM64_PTR_AUTH)		+= pointer_auth.o
> +obj-$(CONFIG_ARM64_MPAM)		+= mpam.o
>  obj-$(CONFIG_ARM64_MTE)			+= mte.o
>  obj-y					+= vdso-wrap.o
>  obj-$(CONFIG_COMPAT_VDSO)		+= vdso32-wrap.o
> diff --git a/arch/arm64/kernel/mpam.c b/arch/arm64/kernel/mpam.c
> new file mode 100644
> index 000000000000..9866d2ca0faa
> --- /dev/null
> +++ b/arch/arm64/kernel/mpam.c
> @@ -0,0 +1,13 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/* Copyright (C) 2025 Arm Ltd. */
> +
> +#include <asm/mpam.h>
> +
> +#include <linux/jump_label.h>
> +#include <linux/percpu.h>
> +
> +DEFINE_STATIC_KEY_FALSE(mpam_enabled);
> +DEFINE_PER_CPU(u64, arm64_mpam_default);
> +DEFINE_PER_CPU(u64, arm64_mpam_current);
> +
> +u64 arm64_mpam_global_default;
> diff --git a/arch/arm64/kernel/process.c b/arch/arm64/kernel/process.c
> index 489554931231..47698955fa1e 100644
> --- a/arch/arm64/kernel/process.c
> +++ b/arch/arm64/kernel/process.c
> @@ -51,6 +51,7 @@
>  #include <asm/fpsimd.h>
>  #include <asm/gcs.h>
>  #include <asm/mmu_context.h>
> +#include <asm/mpam.h>
>  #include <asm/mte.h>
>  #include <asm/processor.h>
>  #include <asm/pointer_auth.h>
> @@ -738,6 +739,12 @@ struct task_struct *__switch_to(struct task_struct *prev,
>  	if (prev->thread.sctlr_user != next->thread.sctlr_user)
>  		update_sctlr_el1(next->thread.sctlr_user);
>  
> +	/*
> +	 * MPAM thread switch happens after the DSB to ensure prev's accesses
> +	 * use prev's MPAM settings.
> +	 */
> +	mpam_thread_switch(next);
> +
>  	/* the actual thread switch */
>  	last = cpu_switch_to(prev, next);
>  
> diff --git a/drivers/resctrl/mpam_devices.c b/drivers/resctrl/mpam_devices.c
> index ff861291bd4e..d50461d6ff3f 100644
> --- a/drivers/resctrl/mpam_devices.c
> +++ b/drivers/resctrl/mpam_devices.c
> @@ -29,8 +29,6 @@
>  
>  #include "mpam_internal.h"
>  
> -DEFINE_STATIC_KEY_FALSE(mpam_enabled); /* This moves to arch code */
> -
>  /*
>   * mpam_list_lock protects the SRCU lists when writing. Once the
>   * mpam_enabled key is enabled these lists are read-only,
> diff --git a/drivers/resctrl/mpam_internal.h b/drivers/resctrl/mpam_internal.h
> index e8971842b124..4632985bcca6 100644
> --- a/drivers/resctrl/mpam_internal.h
> +++ b/drivers/resctrl/mpam_internal.h
> @@ -16,12 +16,12 @@
>  #include <linux/srcu.h>
>  #include <linux/types.h>
>  
> +#include <asm/mpam.h>
> +
>  #define MPAM_MSC_MAX_NUM_RIS	16
>  
>  struct platform_device;
>  
> -DECLARE_STATIC_KEY_FALSE(mpam_enabled);
> -
>  #ifdef CONFIG_MPAM_KUNIT_TEST
>  #define PACKED_FOR_KUNIT __packed
>  #else

-- 
Best regards,
Jinjie


  reply	other threads:[~2026-11-05 12:21 UTC|newest]

Thread overview: 101+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-03-13 14:45 [PATCH v6 00/40] arm_mpam: Add KVM/arm64 and resctrl glue code Ben Horgan
2026-03-13 14:45 ` [PATCH v6 01/40] arm_mpam: Ensure in_reset_state is false after applying configuration Ben Horgan
2026-03-17 17:22   ` Jonathan Cameron
2026-03-23  4:37   ` Gavin Shan
2026-03-27 15:42   ` James Morse
2026-09-09  8:51   ` Jinjie Ruan
2026-03-13 14:45 ` [PATCH v6 02/40] arm_mpam: Reset when feature configuration bit unset Ben Horgan
2026-03-23  4:44   ` Gavin Shan
2026-03-27 16:21   ` James Morse
2026-09-11  6:44   ` Jinjie Ruan
2026-09-11  8:16     ` Ben Horgan
2026-03-13 14:45 ` [PATCH v6 03/40] arm64/sysreg: Add MPAMSM_EL1 register Ben Horgan
2026-09-09  8:37   ` Jinjie Ruan
2026-03-13 14:45 ` [PATCH v6 04/40] KVM: arm64: Preserve host MPAM configuration when changing traps Ben Horgan
2026-09-11  8:19   ` Jinjie Ruan
2026-03-13 14:45 ` [PATCH v6 05/40] KVM: arm64: Make MPAMSM_EL1 accesses UNDEF Ben Horgan
2026-09-11  8:20   ` Jinjie Ruan
2026-03-13 14:45 ` [PATCH v6 06/40] arm64: mpam: Context switch the MPAM registers Ben Horgan
2026-11-05 12:20   ` Jinjie Ruan [this message]
2026-11-05 12:36     ` Ben Horgan
2026-03-13 14:45 ` [PATCH v6 07/40] arm64: mpam: Re-initialise MPAM regs when CPU comes online Ben Horgan
2026-03-13 14:45 ` [PATCH v6 08/40] arm64: mpam: Drop the CONFIG_EXPERT restriction Ben Horgan
2026-03-27 15:43   ` James Morse
2026-03-13 14:45 ` [PATCH v6 09/40] arm64: mpam: Advertise the CPUs MPAM limits to the driver Ben Horgan
2026-03-13 14:45 ` [PATCH v6 10/40] arm64: mpam: Add cpu_pm notifier to restore MPAM sysregs Ben Horgan
2026-03-13 14:45 ` [PATCH v6 11/40] arm64: mpam: Initialise and context switch the MPAMSM_EL1 register Ben Horgan
2026-03-27 15:44   ` James Morse
2026-03-13 14:45 ` [PATCH v6 12/40] arm64: mpam: Add helpers to change a task or cpu's MPAM PARTID/PMG values Ben Horgan
2026-03-13 14:45 ` [PATCH v6 13/40] KVM: arm64: Force guest EL1 to use user-space's partid configuration Ben Horgan
2026-03-13 14:45 ` [PATCH v6 14/40] arm_mpam: resctrl: Add boilerplate cpuhp and domain allocation Ben Horgan
2026-03-23  6:31   ` Gavin Shan
2026-03-23 10:13     ` Ben Horgan
2026-03-26 12:20       ` James Morse
2026-03-13 14:45 ` [PATCH v6 15/40] arm_mpam: resctrl: Pick the caches we will use as resctrl resources Ben Horgan
2026-03-23  6:37   ` Gavin Shan
2026-03-13 14:45 ` [PATCH v6 16/40] arm_mpam: resctrl: Implement resctrl_arch_reset_all_ctrls() Ben Horgan
2026-03-23  6:41   ` Gavin Shan
2026-03-13 14:45 ` [PATCH v6 17/40] arm_mpam: resctrl: Add resctrl_arch_get_config() Ben Horgan
2026-03-23  6:47   ` Gavin Shan
2026-03-13 14:45 ` [PATCH v6 18/40] arm_mpam: resctrl: Implement helpers to update configuration Ben Horgan
2026-03-23  6:51   ` Gavin Shan
2026-03-13 14:45 ` [PATCH v6 19/40] arm_mpam: resctrl: Add plumbing against arm64 task and cpu hooks Ben Horgan
2026-03-23  6:55   ` Gavin Shan
2026-03-13 14:45 ` [PATCH v6 20/40] arm_mpam: resctrl: Add CDP emulation Ben Horgan
2026-03-23 22:35   ` Gavin Shan
2026-03-13 14:45 ` [PATCH v6 21/40] arm_mpam: resctrl: Hide CDP emulation behind CONFIG_EXPERT Ben Horgan
2026-03-18 11:04   ` Zeng Heng
2026-03-23 22:36   ` Gavin Shan
2026-03-27 15:44   ` James Morse
2026-03-13 14:45 ` [PATCH v6 22/40] arm_mpam: resctrl: Convert to/from MPAMs fixed-point formats Ben Horgan
2026-03-23 22:49   ` Gavin Shan
2026-03-27 15:47     ` James Morse
2026-03-13 14:46 ` [PATCH v6 23/40] arm_mpam: resctrl: Add rmid index helpers Ben Horgan
2026-03-23 22:50   ` Gavin Shan
2026-03-13 14:46 ` [PATCH v6 24/40] arm_mpam: resctrl: Wait for cacheinfo to be ready Ben Horgan
2026-03-23 22:53   ` Gavin Shan
2026-03-13 14:46 ` [PATCH v6 25/40] arm_mpam: resctrl: Add support for 'MB' resource Ben Horgan
2026-03-23 23:09   ` Gavin Shan
2026-03-27 15:47     ` James Morse
2026-03-13 14:46 ` [PATCH v6 26/40] arm_mpam: resctrl: Add kunit test for control format conversions Ben Horgan
2026-03-23 23:10   ` Gavin Shan
2026-03-13 14:46 ` [PATCH v6 27/40] arm_mpam: resctrl: Add monitor initialisation and domain boilerplate Ben Horgan
2026-03-24  3:40   ` Gavin Shan
2026-03-13 14:46 ` [PATCH v6 28/40] arm_mpam: resctrl: Add support for csu counters Ben Horgan
2026-03-24  3:40   ` Gavin Shan
2026-03-13 14:46 ` [PATCH v6 29/40] arm_mpam: resctrl: Allow resctrl to allocate monitors Ben Horgan
2026-03-24  3:41   ` Gavin Shan
2026-03-13 14:46 ` [PATCH v6 30/40] arm_mpam: resctrl: Add resctrl_arch_rmid_read() Ben Horgan
2026-03-24  3:41   ` Gavin Shan
2026-03-13 14:46 ` [PATCH v6 31/40] arm_mpam: resctrl: Update the rmid reallocation limit Ben Horgan
2026-03-24  3:42   ` Gavin Shan
2026-03-13 14:46 ` [PATCH v6 32/40] arm_mpam: resctrl: Add empty definitions for assorted resctrl functions Ben Horgan
2026-03-24  3:42   ` Gavin Shan
2026-03-13 14:46 ` [PATCH v6 33/40] arm64: mpam: Select ARCH_HAS_CPU_RESCTRL Ben Horgan
2026-03-24  3:42   ` Gavin Shan
2026-03-13 14:46 ` [PATCH v6 34/40] arm_mpam: resctrl: Call resctrl_init() on platforms that can support resctrl Ben Horgan
2026-03-24  3:43   ` Gavin Shan
2026-03-13 14:46 ` [PATCH v6 35/40] arm_mpam: Add quirk framework Ben Horgan
2026-03-24  3:56   ` Gavin Shan
2026-03-13 14:46 ` [PATCH v6 36/40] arm_mpam: Add workaround for T241-MPAM-1 Ben Horgan
2026-03-24  4:16   ` Gavin Shan
2026-03-27 15:48     ` James Morse
2026-03-13 14:46 ` [PATCH v6 37/40] arm_mpam: Add workaround for T241-MPAM-4 Ben Horgan
2026-03-24  4:19   ` Gavin Shan
2026-03-13 14:46 ` [PATCH v6 38/40] arm_mpam: Add workaround for T241-MPAM-6 Ben Horgan
2026-03-24  4:20   ` Gavin Shan
2026-03-13 14:46 ` [PATCH v6 39/40] arm_mpam: Quirk CMN-650's CSU NRDY behaviour Ben Horgan
2026-03-24  4:21   ` Gavin Shan
2026-03-13 14:46 ` [PATCH v6 40/40] arm64: mpam: Add initial MPAM documentation Ben Horgan
2026-03-24  6:04   ` Gavin Shan
2026-03-17  0:25 ` [PATCH v6 00/40] arm_mpam: Add KVM/arm64 and resctrl glue code Jesse Chick
2026-03-18 10:22   ` Ben Horgan
2026-03-18  8:09 ` Shaopeng Tan (Fujitsu)
2026-03-18 10:23   ` Ben Horgan
2026-03-23  4:41 ` Gavin Shan
2026-03-24 10:09   ` Ben Horgan
2026-04-01 23:56 ` Fenghua Yu
2026-04-13 14:31   ` Ben Horgan
2026-04-02 23:38 ` Rose, Charles
2026-04-13 14:32   ` Ben Horgan
2026-04-13 14:41 ` Ben Horgan

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