From: Douglas Anderson <dianders@chromium.org>
To: ulf.hansson@linaro.org, kishon@ti.com,
Heiko Stuebner <heiko@sntech.de>,
robh+dt@kernel.org
Cc: shawn.lin@rock-chips.com, xzy.xu@rock-chips.com,
briannorris@chromium.org, adrian.hunter@intel.com,
linux-rockchip@lists.infradead.org, linux-mmc@vger.kernel.org,
devicetree@vger.kernel.org,
Douglas Anderson <dianders@chromium.org>,
pawel.moll@arm.com, mark.rutland@arm.com,
ijc+devicetree@hellion.org.uk, galak@codeaurora.org,
linux-kernel@vger.kernel.org
Subject: [PATCH v2 06/11] Documentation: mmc: sdhci-of-arasan: Add ability to export card clock
Date: Mon, 13 Jun 2016 16:04:30 -0700 [thread overview]
Message-ID: <1465859076-4868-7-git-send-email-dianders@chromium.org> (raw)
In-Reply-To: <1465859076-4868-1-git-send-email-dianders@chromium.org>
Some SD/eMMC PHYs (like the PHY from Arasan that is designed to work
with arasan,sdhci-5.1) need to know the card clock frequency in order to
function properly. Physically in a SoC this clock is exported from the
SDHCI IP block to the PHY IP block and the PHY needs to know the speed.
Let's export the SDHCI card clock using a standard device tree mechanism
so that the PHY can get access to it and query the card clock frequency.
Signed-off-by: Douglas Anderson <dianders@chromium.org>
Acked-by: Rob Herring <robh@kernel.org>
---
Changes in v2:
- Adjust commit message wording (Rob)
- Add Rob Herring's Ack.
Documentation/devicetree/bindings/mmc/arasan,sdhci.txt | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/Documentation/devicetree/bindings/mmc/arasan,sdhci.txt b/Documentation/devicetree/bindings/mmc/arasan,sdhci.txt
index 476604e6ce2a..3404afa9b938 100644
--- a/Documentation/devicetree/bindings/mmc/arasan,sdhci.txt
+++ b/Documentation/devicetree/bindings/mmc/arasan,sdhci.txt
@@ -30,6 +30,12 @@ Optional Properties:
- arasan,soc-ctl-syscon: A phandle to a syscon device (see ../mfd/syscon.txt)
used to access core corecfg registers. Offsets of registers in this
syscon are determined based on the main compatible string for the device.
+ - clock-output-names: If specified, this will be the name of the card clock
+ which will be exposed by this device. Required if #clock-cells is
+ specified.
+ - #clock-cells: If specified this should be the value <0>. With this property
+ in place we will export a clock representing the Card Clock. This clock
+ is expected to be consumed by our PHY. You must also specify
Example:
sdhci@e0100000 {
@@ -61,7 +67,9 @@ Example:
arasan,soc-ctl-syscon = <&grf>;
assigned-clocks = <&cru SCLK_EMMC>;
assigned-clock-rates = <200000000>;
+ clock-output-names = "emmc_cardclock";
phys = <&emmc_phy>;
phy-names = "phy_arasan";
+ #clock-cells = <0>;
status = "disabled";
};
--
2.8.0.rc3.226.g39d4020
next prev parent reply other threads:[~2016-06-13 23:09 UTC|newest]
Thread overview: 33+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-06-13 23:04 [PATCH v2 0/11] Changes to support 150 MHz eMMC on rk3399 Douglas Anderson
2016-06-13 23:04 ` [PATCH v2 01/11] phy: rockchip-emmc: Increase lock time allowance Douglas Anderson
2016-06-14 0:28 ` Shawn Lin
2016-06-20 13:03 ` Kishon Vijay Abraham I
2016-06-13 23:04 ` [PATCH v2 02/11] mmc: sdhci-of-arasan: Always power the PHY off/on when clock changes Douglas Anderson
2016-06-14 0:30 ` Shawn Lin
2016-06-13 23:04 ` [PATCH v2 03/11] Documentation: mmc: sdhci-of-arasan: Add soc-ctl-syscon for corecfg regs Douglas Anderson
2016-06-14 0:33 ` Shawn Lin
2016-06-18 14:15 ` Heiko Stübner
2016-06-13 23:04 ` [PATCH v2 04/11] mmc: sdhci-of-arasan: Properly set corecfg_baseclkfreq on rk3399 Douglas Anderson
2016-06-18 17:59 ` Heiko Stuebner
2016-06-13 23:04 ` [PATCH v2 05/11] arm64: dts: rockchip: Add soc-ctl-syscon to sdhci for rk3399 Douglas Anderson
2016-06-18 12:49 ` Heiko Stübner
2016-06-13 23:04 ` Douglas Anderson [this message]
2016-06-18 18:02 ` [PATCH v2 06/11] Documentation: mmc: sdhci-of-arasan: Add ability to export card clock Heiko Stuebner
2016-06-13 23:04 ` [PATCH v2 07/11] " Douglas Anderson
2016-06-15 16:40 ` Doug Anderson
2016-06-13 23:04 ` [PATCH v2 08/11] Documentation: phy: Let the rockchip eMMC PHY get an exported " Douglas Anderson
2016-06-16 18:42 ` Rob Herring
2016-06-18 21:48 ` Heiko Stübner
2016-06-20 13:04 ` Kishon Vijay Abraham I
2016-06-13 23:04 ` [PATCH v2 09/11] phy: rockchip-emmc: Minor code cleanup in rockchip_emmc_phy_power_on/off() Douglas Anderson
2016-06-14 0:36 ` Shawn Lin
2016-06-20 13:04 ` Kishon Vijay Abraham I
2016-06-13 23:04 ` [PATCH v2 10/11] phy: rockchip-emmc: Set phyctrl_frqsel based on card clock Douglas Anderson
2016-06-18 12:20 ` Heiko Stübner
2016-06-20 16:48 ` Doug Anderson
2016-06-20 13:08 ` Kishon Vijay Abraham I
2016-06-13 23:04 ` [PATCH v2 11/11] arm64: dts: rockchip: Provide emmcclk to PHY for rk3399 Douglas Anderson
2016-06-18 12:07 ` Heiko Stübner
2016-06-16 23:39 ` [PATCH v2 0/11] Changes to support 150 MHz eMMC on rk3399 Heiko Stuebner
2016-06-17 12:39 ` Kishon Vijay Abraham I
2016-06-17 15:37 ` Doug Anderson
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