From: Jon Mason <jon.mason@broadcom.com>
To: Arnd Bergmann <arnd@arndb.de>
Cc: Florian Fainelli <f.fainelli@gmail.com>,
bcm-kernel-feedback-list@broadcom.com,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, Jon Mason <jonmason@broadcom.com>
Subject: [PATCH 1/2] arm: dts: bcm5301x: Add syscon based reboot in DT
Date: Tue, 28 Jun 2016 18:10:32 -0400 [thread overview]
Message-ID: <1467151833-20767-2-git-send-email-jon.mason@broadcom.com> (raw)
In-Reply-To: <1467151833-20767-1-git-send-email-jon.mason@broadcom.com>
From: Jon Mason <jonmason@broadcom.com>
Add the ability to reboot via a reset of the processor. This is
achieved via a write of 0x39 to the CRU Reset Register. Unfortunately,
this only resets the core and not the other IP blocks. So if possible,
other methods should be used on the individual boards.
Signed-off-by: Jon Mason <jonmason@broadcom.com>
---
arch/arm/boot/dts/bcm5301x.dtsi | 12 ++++++++++++
1 file changed, 12 insertions(+)
diff --git a/arch/arm/boot/dts/bcm5301x.dtsi b/arch/arm/boot/dts/bcm5301x.dtsi
index 7d4d29b..f878d0d 100644
--- a/arch/arm/boot/dts/bcm5301x.dtsi
+++ b/arch/arm/boot/dts/bcm5301x.dtsi
@@ -260,6 +260,18 @@
"sata2";
};
+ cru: system-controller@1800c184 {
+ compatible = "brcm,bcm53010-cru", "syscon";
+ reg = <0x1800c184 0x4>;
+ };
+
+ reboot@1800c184 {
+ compatible ="syscon-reboot";
+ regmap = <&cru>;
+ offset = <0>;
+ mask = <0x39>;
+ };
+
nand: nand@18028000 {
compatible = "brcm,nand-iproc", "brcm,brcmnand-v6.1", "brcm,brcmnand";
reg = <0x18028000 0x600>, <0x1811a408 0x600>, <0x18028f00 0x20>;
--
1.9.1
next prev parent reply other threads:[~2016-06-28 22:17 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-06-28 22:10 [PATCH 0/2] arm: dts: " Jon Mason
2016-06-28 22:10 ` Jon Mason [this message]
2016-06-28 22:13 ` [PATCH 1/2] arm: dts: bcm5301x: Add " Scott Branden
2016-06-28 22:28 ` Jon Mason
2016-06-28 22:10 ` [PATCH 2/2] arm: dts: nsp: " Jon Mason
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