From: Jon Mason <jon.mason@broadcom.com>
To: Arnd Bergmann <arnd@arndb.de>
Cc: Florian Fainelli <f.fainelli@gmail.com>,
bcm-kernel-feedback-list@broadcom.com,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, Jon Mason <jonmason@broadcom.com>
Subject: [PATCH 2/2] arm: dts: nsp: Add syscon based reboot in DT
Date: Tue, 28 Jun 2016 18:10:33 -0400 [thread overview]
Message-ID: <1467151833-20767-3-git-send-email-jon.mason@broadcom.com> (raw)
In-Reply-To: <1467151833-20767-1-git-send-email-jon.mason@broadcom.com>
From: Jon Mason <jonmason@broadcom.com>
Add the ability to reboot via a reset of the processor. This is
achieved via a write of 0x2f9 to the CRU Reset Register. Unfortunately,
this only resets the core and not the other IP blocks. So if possible,
other methods should be used on the individual boards.
Signed-off-by: Jon Mason <jonmason@broadcom.com>
---
arch/arm/boot/dts/bcm-nsp.dtsi | 12 ++++++++++++
1 file changed, 12 insertions(+)
diff --git a/arch/arm/boot/dts/bcm-nsp.dtsi b/arch/arm/boot/dts/bcm-nsp.dtsi
index 1759e65..d56166b 100644
--- a/arch/arm/boot/dts/bcm-nsp.dtsi
+++ b/arch/arm/boot/dts/bcm-nsp.dtsi
@@ -266,6 +266,18 @@
<0x30028 0x04>,
<0x3f408 0x04>;
};
+
+ cru: system-controller@3f184 {
+ compatible = "brcm,nsp-cru", "syscon";
+ reg = <0x3f184 0x4>;
+ };
+
+ reboot: reboot@3f184 {
+ compatible ="syscon-reboot";
+ regmap = <&cru>;
+ offset = <0>;
+ mask = <0x2f9>;
+ };
};
pcie0: pcie@18012000 {
--
1.9.1
prev parent reply other threads:[~2016-06-28 22:17 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-06-28 22:10 [PATCH 0/2] arm: dts: " Jon Mason
2016-06-28 22:10 ` [PATCH 1/2] arm: dts: bcm5301x: Add " Jon Mason
2016-06-28 22:13 ` Scott Branden
2016-06-28 22:28 ` Jon Mason
2016-06-28 22:10 ` Jon Mason [this message]
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