From: Bharat Kumar Gogada <bharat.kumar.gogada@xilinx.com>
To: <bhelgaas@google.com>, <soren.brinkmann@xilinx.com>,
<christophe.jaillet@wanadoo.fr>, <grygorii.strashko@ti.com>,
<yinghai@kernel.org>, <lorenzo.pieralisi@arm.com>,
<fengguang.wu@intel.com>, <michal.simek@xilinx.com>,
<arnd@arndb.de>
Cc: <linux-arm-kernel@lists.infradead.org>,
<linux-pci@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
<rgummal@xilinx.com>, Bharat Kumar Gogada <bharatku@xilinx.com>
Subject: [PATCH 6/6] Microblaze: Modify microblaze pci specific code to support multidomain.
Date: Thu, 1 Sep 2016 15:44:46 +0530 [thread overview]
Message-ID: <1472724886-28301-6-git-send-email-bharatku@xilinx.com> (raw)
In-Reply-To: <1472724886-28301-1-git-send-email-bharatku@xilinx.com>
Proc entries will be created for every pci bus.
With current implementation,in multidomain same bus number
will repaeat but in different domain, which causes kernel crash
as already same bus number exists.
Return domain number when kernel requests while creating proc
entries for each bus.
Signed-off-by: Bharat Kumar Gogada <bharatku@xilinx.com>
---
arch/microblaze/pci/pci-common.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/microblaze/pci/pci-common.c b/arch/microblaze/pci/pci-common.c
index 81556b8..7f696f9 100644
--- a/arch/microblaze/pci/pci-common.c
+++ b/arch/microblaze/pci/pci-common.c
@@ -632,10 +632,10 @@ void pci_process_bridge_OF_ranges(struct pci_controller *hose,
}
}
-/* Decide whether to display the domain number in /proc */
+/* Display the domain number in /proc */
int pci_proc_domain(struct pci_bus *bus)
{
- return 0;
+ return pci_domain_nr(bus);
}
/* This header fixup will do the resource fixup for all devices as they are
--
2.1.1
next prev parent reply other threads:[~2016-09-01 10:15 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-09-01 10:14 [PATCH 1/6] PCI: xilinx: Keep both legacy and MSI interrupt references Bharat Kumar Gogada
2016-09-01 10:14 ` [PATCH 2/6] PCI: Xilinx : Clear interrupt register for invalid interrupt Bharat Kumar Gogada
2016-09-01 10:14 ` [PATCH 3/6] PCI: Xilinx: Clear correct msi set bit Bharat Kumar Gogada
2016-09-01 10:14 ` [PATCH 4/6] PCI: Xilinx: Dispose MSI virtual irq Bharat Kumar Gogada
2016-09-01 10:14 ` [PATCH 5/6] PCI: Xilinx: Read more than one function per device Bharat Kumar Gogada
2016-09-01 10:14 ` Bharat Kumar Gogada [this message]
2016-09-12 22:21 ` [PATCH 1/6] PCI: xilinx: Keep both legacy and MSI interrupt references Bjorn Helgaas
2016-09-13 15:56 ` Bjorn Helgaas
2016-09-14 15:32 ` Bharat Kumar Gogada
2016-09-14 19:17 ` Bjorn Helgaas
2016-09-15 5:09 ` Bharat Kumar Gogada
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