[PATCH] phy: rockchip-typec: add pm runtime support

[PATCH] phy: rockchip-typec: add pm runtime support

[Chris Zhong]

Adds pm_runtime support for rockchip Type-C, so that power domain is
enabled only when there is a transaction going on to help save power.

Signed-off-by: Chris Zhong <zyw@rock-chips.com>
---

 drivers/phy/phy-rockchip-typec.c | 18 ++++++++++++++++++
 1 file changed, 18 insertions(+)

diff --git a/drivers/phy/phy-rockchip-typec.c b/drivers/phy/phy-rockchip-typec.c
index fb58a27..e1a07aa 100644
--- a/drivers/phy/phy-rockchip-typec.c
+++ b/drivers/phy/phy-rockchip-typec.c
@@ -552,6 +552,12 @@ static int tcphy_phy_init(struct rockchip_typec_phy *tcphy, u8 mode)
 		goto err_clk_core;
 	}
 
+	ret = pm_runtime_get_sync(tcphy->dev);
+	if (ret < 0) {
+		dev_err(tcphy->dev, "cannot get pm runtime %d\n", ret);
+		goto err_clk_ref;
+	}
+
 	reset_control_deassert(tcphy->tcphy_rst);
 
 	property_enable(tcphy, &cfg->typec_conn_dir, tcphy->flip);
@@ -602,6 +608,7 @@ static int tcphy_phy_init(struct rockchip_typec_phy *tcphy, u8 mode)
 err_wait_pma:
 	reset_control_assert(tcphy->uphy_rst);
 	reset_control_assert(tcphy->tcphy_rst);
+err_clk_ref:
 	clk_disable_unprepare(tcphy->clk_ref);
 err_clk_core:
 	clk_disable_unprepare(tcphy->clk_core);
@@ -610,6 +617,7 @@ err_clk_core:
 
 static void tcphy_phy_deinit(struct rockchip_typec_phy *tcphy)
 {
+	pm_runtime_put_sync(tcphy->dev);
 	reset_control_assert(tcphy->tcphy_rst);
 	reset_control_assert(tcphy->uphy_rst);
 	reset_control_assert(tcphy->pipe_rst);
@@ -987,6 +995,15 @@ static int rockchip_typec_phy_probe(struct platform_device *pdev)
 		return PTR_ERR(phy_provider);
 	}
 
+	pm_runtime_enable(dev);
+
+	return 0;
+}
+
+static int rockchip_typec_phy_remove(struct platform_device *pdev)
+{
+	pm_runtime_disable(&pdev->dev);
+
 	return 0;
 }
 
@@ -999,6 +1016,7 @@ MODULE_DEVICE_TABLE(of, rockchip_typec_phy_dt_ids);
 
 static struct platform_driver rockchip_typec_phy_driver = {
 	.probe		= rockchip_typec_phy_probe,
+	.remove		= rockchip_typec_phy_remove,
 	.driver		= {
 		.name	= "rockchip-typec-phy",
 		.of_match_table = rockchip_typec_phy_dt_ids,
-- 
1.9.1

[PATCH] arm64: dts: rk3399: add powerdomain for typec

[Chris Zhong]

The tcpc power domain will try to power up/down the power of Type-C PHY.
Hence, we need control it in Type-C PHY driver with the pm_runtime helper.

Change-Id: I727ed3f7c6e7075f41f0940470796ba0cd3232df
Signed-off-by: Chris Zhong <zyw@rock-chips.com>
---
 arch/arm64/boot/dts/rockchip/rk3399.dtsi | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
index 8c51095..3eb52b3 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
@@ -1262,6 +1262,7 @@
 		clock-names = "tcpdcore", "tcpdphy-ref";
 		assigned-clocks = <&cru SCLK_UPHY0_TCPDCORE>;
 		assigned-clock-rates = <50000000>;
+		power-domains = <&power RK3399_PD_TCPD0>;
 		resets = <&cru SRST_UPHY0>,
 			 <&cru SRST_UPHY0_PIPE_L00>,
 			 <&cru SRST_P_UPHY0_TCPHY>;
@@ -1290,6 +1291,7 @@
 		clock-names = "tcpdcore", "tcpdphy-ref";
 		assigned-clocks = <&cru SCLK_UPHY1_TCPDCORE>;
 		assigned-clock-rates = <50000000>;
+		power-domains = <&power RK3399_PD_TCPD1>;
 		resets = <&cru SRST_UPHY1>,
 			 <&cru SRST_UPHY1_PIPE_L00>,
 			 <&cru SRST_P_UPHY1_TCPHY>;
-- 
1.9.1