From: Vladimir Murzin <vladimir.murzin@arm.com>
To: linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org
Cc: marc.zyngier@arm.com, tglx@linutronix.de, jason@lakedaemon.net
Subject: [RESEND PATCH v1 0/6] Support GICv3 ITS in 32-bit mode
Date: Mon, 7 Nov 2016 09:21:16 +0000 [thread overview]
Message-ID: <1478510482-15471-1-git-send-email-vladimir.murzin@arm.com> (raw)
Hi,
This series introduces GICv3 ITS to 32-bit world. Since I'm limited
with real world 32-bit platforms which uses ITS it was tested with
help of vITS on 64-bit host running 32-bit guest.
I used Andrea's its/v8 branch at [1] with following option passed to
kvmtool: --aarch32 --irqchip=gicv3-its --force-pci
[1] git://www.linux-arm.org/kvmtool.git
Changelog:
RFC -> v1
- rebased on 4.9-rc2, gits_read_typer() has been dropped
- spilt ITS and vITS in separate patch sets
Vladimir Murzin (6):
irqchip/gic-v3-its: Change unsigned types for AArch32 compatibility
irqchip/gic-v3-its: Narrow down Entry Size when used as a divider
irqchip/gicv3-its: Specialise flush_dcache operation
irqchip/gicv3-its: Specialise readq and writeq accesses
ARM: gic-v3-its: Add 32bit support to GICv3 ITS
ARM: virt: Select ARM_GIC_V3_ITS
arch/arm/Kconfig | 1 +
arch/arm/include/asm/arch_gicv3.h | 54 +++++++++++++++++++++----
arch/arm64/include/asm/arch_gicv3.h | 17 ++++++++
drivers/irqchip/irq-gic-v3-its.c | 75 +++++++++++++++++------------------
include/linux/irqchip/arm-gic-v3.h | 4 +-
5 files changed, 104 insertions(+), 47 deletions(-)
--
1.7.9.5
next reply other threads:[~2016-11-07 9:22 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-11-07 9:21 Vladimir Murzin [this message]
2016-11-07 9:21 ` [RESEND PATCH v1 1/6] irqchip/gic-v3-its: Change unsigned types for AArch32 compatibility Vladimir Murzin
2016-11-07 9:21 ` [RESEND PATCH v1 2/6] irqchip/gic-v3-its: Narrow down Entry Size when used as a divider Vladimir Murzin
2016-11-07 9:21 ` [RESEND PATCH v1 3/6] irqchip/gicv3-its: Specialise flush_dcache operation Vladimir Murzin
2016-11-07 9:21 ` [RESEND PATCH v1 4/6] irqchip/gicv3-its: Specialise readq and writeq accesses Vladimir Murzin
2016-11-07 9:21 ` [RESEND PATCH v1 5/6] ARM: gic-v3-its: Add 32bit support to GICv3 ITS Vladimir Murzin
2016-11-07 9:21 ` [RESEND PATCH v1 6/6] ARM: virt: Select ARM_GIC_V3_ITS Vladimir Murzin
2016-11-14 10:06 ` [RESEND PATCH v1 0/6] Support GICv3 ITS in 32-bit mode Marc Zyngier
2016-11-14 10:16 ` Vladimir Murzin
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=1478510482-15471-1-git-send-email-vladimir.murzin@arm.com \
--to=vladimir.murzin@arm.com \
--cc=jason@lakedaemon.net \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-kernel@vger.kernel.org \
--cc=marc.zyngier@arm.com \
--cc=tglx@linutronix.de \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox
all inboxes | Powered by JetHome®