[PATCH 4/6] x86/platform/uv/BAU: Implement uv4_wait_completion with read_status

[Andrew Banman <abanman@hpe.com>]

UV4 does not employ a software-timeout as in previous generations so a new
wait_completion routine without this logic is required. Certain completion
statuses require the AUX status bit in addition to ERROR and BUSY.

Add the read_status routine to construct the full completion status. Use
read_status in the uv4_wait_completion routine to handle all possible
completion statuses.

Signed-off-by: Andrew Banman <abanman@hpe.com>
Acked-by: Mike Travis <mike.travis@hpe.com>
---
 arch/x86/platform/uv/tlb_uv.c | 65 ++++++++++++++++++++++++++++++++++++++++++-
 1 file changed, 64 insertions(+), 1 deletion(-)

Index: community/arch/x86/platform/uv/tlb_uv.c
===================================================================
--- community.orig/arch/x86/platform/uv/tlb_uv.c
+++ community/arch/x86/platform/uv/tlb_uv.c
@@ -27,6 +27,8 @@ static int uv1_wait_completion(struct ba
 				struct bau_control *bcp, long try);
 static int uv2_3_wait_completion(struct bau_desc *bau_desc,
 				struct bau_control *bcp, long try);
+static int uv4_wait_completion(struct bau_desc *bau_desc,
+				struct bau_control *bcp, long try);
 
 static struct bau_operations ops;
 
@@ -60,7 +62,7 @@ static struct bau_operations uv4_bau_ops
 	.write_g_sw_ack          = write_gmmr_proc_sw_ack,
 	.write_payload_first     = write_mmr_proc_payload_first,
 	.write_payload_last      = write_mmr_proc_payload_last,
-	.wait_completion         = uv2_3_wait_completion,
+	.wait_completion         = uv4_wait_completion,
 };
 
 
@@ -742,6 +744,67 @@ static int uv2_3_wait_completion(struct
 	}
 	bcp->conseccompletes++;
 	return FLUSH_COMPLETE;
+}
+
+/*
+ * Returns the status of current BAU message for cpu desc as a bit field
+ * [Error][Busy][Aux]
+ */
+static unsigned long read_status(unsigned long status_mmr, int index, int desc)
+{
+	unsigned long descriptor_status;
+
+	descriptor_status =
+		((read_lmmr(status_mmr) >> index) & UV_ACT_STATUS_MASK) << 1;
+
+	descriptor_status |=
+		(read_lmmr(UVH_LB_BAU_SB_ACTIVATION_STATUS_2) >> desc) & 0x1;
+
+	return descriptor_status;
+}
+
+static int uv4_wait_completion(struct bau_desc *bau_desc,
+				struct bau_control *bcp, long try)
+{
+	unsigned long descriptor_stat;
+	unsigned long err_busy_mmr;
+	int err_busy_index;
+	int desc = bcp->uvhub_cpu;
+	struct ptc_stats *stat = bcp->statp;
+
+	status_mmr_loc(&err_busy_mmr, &err_busy_index, desc);
+	descriptor_stat = read_status(err_busy_mmr, err_busy_index, desc);
+
+	/* spin on the status MMR, waiting for it to go idle */
+	while (descriptor_stat != UV2H_DESC_IDLE) {
+		switch (descriptor_stat) {
+		case UV2H_DESC_SOURCE_TIMEOUT:
+			stat->s_stimeout++;
+			return FLUSH_GIVEUP;
+
+		case UV2H_DESC_DEST_TIMEOUT:
+			stat->s_dtimeout++;
+			bcp->conseccompletes = 0;
+			return FLUSH_RETRY_TIMEOUT;
+
+		case UV2H_DESC_DEST_STRONG_NACK:
+			stat->s_plugged++;
+			bcp->conseccompletes = 0;
+			return FLUSH_RETRY_PLUGGED;
+
+		case UV2H_DESC_DEST_PUT_ERR:
+			bcp->conseccompletes = 0;
+			return FLUSH_GIVEUP;
+
+		default:
+			/* descriptor_stat is still BUSY */
+			cpu_relax();
+		}
+		descriptor_stat =
+			read_status(err_busy_mmr, err_busy_index, desc);
+	}
+	bcp->conseccompletes++;
+	return FLUSH_COMPLETE;
 }
 
 /*