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From: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
To: yamada.masahiro@socionext.com, robh+dt@kernel.org, mark.rutland@arm.com
Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org, masami.hiramatsu@linaro.org,
	jaswinder.singh@linaro.org,
	Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Subject: [RESEND PATCH v4 1/2] ARM: dts: uniphier: add nodes of thermal monitor and thermal zone for PXs2
Date: Mon,  4 Sep 2017 15:58:36 +0900	[thread overview]
Message-ID: <1504508317-12076-2-git-send-email-hayashi.kunihiko@socionext.com> (raw)
In-Reply-To: <1504508317-12076-1-git-send-email-hayashi.kunihiko@socionext.com>

Add nodes of thermal monitor and thermal zone for UniPhier PXs2 SoC.
The thermal monitor node is included in sysctrl. Since the efuse might not
have a calibrated value of thermal monitor, this patch gives the default
value for PXs2.

Furthermore, add cpuN labels for reference in cooling-device property.

Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
---
 arch/arm/boot/dts/uniphier-pxs2.dtsi | 47 +++++++++++++++++++++++++++++++++---
 1 file changed, 43 insertions(+), 4 deletions(-)

diff --git a/arch/arm/boot/dts/uniphier-pxs2.dtsi b/arch/arm/boot/dts/uniphier-pxs2.dtsi
index 90b020c..f2dfebe 100644
--- a/arch/arm/boot/dts/uniphier-pxs2.dtsi
+++ b/arch/arm/boot/dts/uniphier-pxs2.dtsi
@@ -7,6 +7,8 @@
  * SPDX-License-Identifier: (GPL-2.0+ OR MIT)
  */
 
+#include <dt-bindings/thermal/thermal.h>
+
 / {
 	compatible = "socionext,uniphier-pxs2";
 	#address-cells = <1>;
@@ -16,7 +18,7 @@
 		#address-cells = <1>;
 		#size-cells = <0>;
 
-		cpu@0 {
+		cpu0: cpu@0 {
 			device_type = "cpu";
 			compatible = "arm,cortex-a9";
 			reg = <0>;
@@ -24,9 +26,10 @@
 			enable-method = "psci";
 			next-level-cache = <&l2>;
 			operating-points-v2 = <&cpu_opp>;
+			#cooling-cells = <2>;
 		};
 
-		cpu@1 {
+		cpu1: cpu@1 {
 			device_type = "cpu";
 			compatible = "arm,cortex-a9";
 			reg = <1>;
@@ -36,7 +39,7 @@
 			operating-points-v2 = <&cpu_opp>;
 		};
 
-		cpu@2 {
+		cpu2: cpu@2 {
 			device_type = "cpu";
 			compatible = "arm,cortex-a9";
 			reg = <2>;
@@ -46,7 +49,7 @@
 			operating-points-v2 = <&cpu_opp>;
 		};
 
-		cpu@3 {
+		cpu3: cpu@3 {
 			device_type = "cpu";
 			compatible = "arm,cortex-a9";
 			reg = <3>;
@@ -114,6 +117,35 @@
 		};
 	};
 
+	thermal-zones {
+		cpu_thermal {
+			polling-delay-passive = <250>;	/* 250ms */
+			polling-delay = <1000>;		/* 1000ms */
+			thermal-sensors = <&pvtctl>;
+
+			trips {
+				cpu_crit: cpu_crit {
+					temperature = <95000>;	/* 95C */
+					hysteresis = <2000>;
+					type = "critical";
+				};
+				cpu_alert: cpu_alert {
+					temperature = <85000>;	/* 85C */
+					hysteresis = <2000>;
+					type = "passive";
+				};
+			};
+
+			cooling-maps {
+				map {
+					trip = <&cpu_alert>;
+					cooling-device = <&cpu0
+					    THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+				};
+			};
+		};
+	};
+
 	soc {
 		compatible = "simple-bus";
 		#address-cells = <1>;
@@ -358,6 +390,13 @@
 				compatible = "socionext,uniphier-pxs2-reset";
 				#reset-cells = <1>;
 			};
+
+			pvtctl: pvtctl {
+				compatible = "socionext,uniphier-pxs2-thermal";
+				interrupts = <0 3 4>;
+				#thermal-sensor-cells = <0>;
+				socionext,tmod-calibration = <0x0f86 0x6844>;
+			};
 		};
 
 		nand: nand@68000000 {
-- 
2.7.4

  reply	other threads:[~2017-09-04  6:58 UTC|newest]

Thread overview: 5+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-09-04  6:58 [RESEND PATCH v4 0/2] add thermal nodes for UniPhier SoCs Kunihiko Hayashi
2017-09-04  6:58 ` Kunihiko Hayashi [this message]
2017-09-04  6:58 ` [RESEND PATCH v4 2/2] arm64: dts: uniphier: add nodes of thermal monitor and thermal zone for LD20 Kunihiko Hayashi
2017-09-18 12:10 ` [RESEND PATCH v4 0/2] add thermal nodes for UniPhier SoCs Masahiro Yamada
2017-10-15 15:19   ` Masahiro Yamada

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