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From: Andrew Jeffery <andrew@aj.id.au>
To: Joel Stanley <joel@jms.id.au>, Lee Jones <lee.jones@linaro.org>,
	Rob Herring <robh+dt@kernel.org>,
	Mark Rutland <mark.rutland@arm.com>
Cc: Arnd Bergmann <arnd@arndb.de>,
	Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
	devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
	Cyril Bur <cyrilbur@gmail.com>,
	Benjamin Herrenschmidt <benh@kernel.crashing.org>,
	Ryan Chen <ryan_chen@aspeedtech.com>,
	Lei YU <mine260309@gmail.com>
Subject: Re: [PATCH 1/3] dt-bindings: aspeed-lpc: Document LPC Host Interface Controller
Date: Fri, 16 Feb 2018 15:34:19 +1030	[thread overview]
Message-ID: <1518757459.10440.32.camel@aj.id.au> (raw)
In-Reply-To: <20180212070847.32387-2-joel@jms.id.au>

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On Mon, 2018-02-12 at 17:38 +1030, Joel Stanley wrote:
> The LPC Host Interface Controller is part of a BMC SoC that is used for
> communication with the host.
> 
> Signed-off-by: Joel Stanley <joel@jms.id.au>
> ---
>  .../devicetree/bindings/mfd/aspeed-lpc.txt         | 40 ++++++++++++++++++++++
>  1 file changed, 40 insertions(+)
> 
> diff --git a/Documentation/devicetree/bindings/mfd/aspeed-lpc.txt b/Documentation/devicetree/bindings/mfd/aspeed-lpc.txt
> index 514d82ced95b..94a31de109c4 100644
> --- a/Documentation/devicetree/bindings/mfd/aspeed-lpc.txt
> +++ b/Documentation/devicetree/bindings/mfd/aspeed-lpc.txt
> @@ -109,6 +109,46 @@ lpc: lpc@1e789000 {
>  	};
>  };
>  
> +BMC Node Children
> +==================
> +
> +LPC Host Interface Controller

This should be under the Host Node Children header given the
function's position in the MMIO layout and the split prescribed by the
bindings.

> +-------------------
> +
> +The LPC Host Interface Controller manages functions exposed to the host such as
> +LPC firmware hub cycles, configuration of the LPC-to-AHB mapping, UART
> +management and bus snoop configuration.
> +
> +Required properties:
> +
> +- compatible:	One of:
> +		"aspeed,ast2400-lpc-ctrl";
> +		"aspeed,ast2500-lpc-ctrl";
> +
> +- reg:		contains offset/length values of the host interface controller
> +		memory regions
> +
> +- clocks:	contains a phandle to the syscon node describing the clocks.
> +		There should then be one cell representing the clock to use
> +
> +- memory-region: A phandle to a reserved_memory region to be used for the LPC
> +		to AHB mapping
> +
> +- flash:	A phandle to the SPI flash controller containing the flash to
> +		be exposed over the LPC to AHB mapping
> +
> +Example:
> +
> +lpc-host@80 {
> +	lpc_ctrl: lpc-ctrl@0 {
> +		compatible = "aspeed,ast2500-lpc-ctrl";
> +		reg = <0x0 0x80>;
> +		clocks = <&syscon ASPEED_CLK_GATE_LCLK>;
> +		memory-region = <&flash_memory>;
> +		flash = <&spi>;
> +	};
> +};

ACK wrt the content, just need to fix its location.

> +
>  Host Node Children
>  ==================
>  

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  reply	other threads:[~2018-02-16  5:04 UTC|newest]

Thread overview: 6+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-02-12  7:08 [PATCH 0/3] misc: aspeed-lpc-ctrl fixes Joel Stanley
2018-02-12  7:08 ` [PATCH 1/3] dt-bindings: aspeed-lpc: Document LPC Host Interface Controller Joel Stanley
2018-02-16  5:04   ` Andrew Jeffery [this message]
2018-02-19  0:10   ` Rob Herring
2018-02-12  7:08 ` [PATCH 2/3] misc: aspeed-lpc: Request and enable LPC clock Joel Stanley
2018-02-12  7:08 ` [PATCH 3/3] misc: aspeed-lpc-ctrl: Enable FWH and A2H bridge cycles Joel Stanley

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