From: Radhey Shyam Pandey <radhey.shyam.pandey@xilinx.com>
To: <vinod.koul@intel.com>, <dan.j.williams@intel.com>,
<michal.simek@xilinx.com>, <appana.durga.rao@xilinx.com>,
<radheys@xilinx.com>, <lars@metafoo.de>
Cc: <dmaengine@vger.kernel.org>,
<linux-arm-kernel@lists.infradead.org>,
<linux-kernel@vger.kernel.org>
Subject: [RFC 1/6] dt-bindings: dma: xilinx_dma: Add optional property has_axieth_connected
Date: Mon, 2 Apr 2018 16:09:01 +0530 [thread overview]
Message-ID: <1522665546-10035-2-git-send-email-radheys@xilinx.com> (raw)
In-Reply-To: <1522665546-10035-1-git-send-email-radheys@xilinx.com>
Add an optional AXI DMA property 'has_axieth_connected'. This can be
specified to indicate that AXI DMA is connected to AXI Ethernet in
hardware design and dma driver needs to do some additional handling.
Signed-off-by: Radhey Shyam Pandey <radheys@xilinx.com>
---
.../devicetree/bindings/dma/xilinx/xilinx_dma.txt | 1 +
1 files changed, 1 insertions(+), 0 deletions(-)
diff --git a/Documentation/devicetree/bindings/dma/xilinx/xilinx_dma.txt b/Documentation/devicetree/bindings/dma/xilinx/xilinx_dma.txt
index a2b8bfa..5d592e3 100644
--- a/Documentation/devicetree/bindings/dma/xilinx/xilinx_dma.txt
+++ b/Documentation/devicetree/bindings/dma/xilinx/xilinx_dma.txt
@@ -42,6 +42,7 @@ Optional properties:
the hardware.
Optional properties for AXI DMA:
- xlnx,mcdma: Tells whether configured for multi-channel mode in the hardware.
+- xlnx,axieth-connected: Tells whether AXI DMA is connected to AXI Ethernet.
Optional properties for VDMA:
- xlnx,flush-fsync: Tells which channel to Flush on Frame sync.
It takes following values:
--
1.7.1
next prev parent reply other threads:[~2018-04-02 10:39 UTC|newest]
Thread overview: 43+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-04-02 10:39 [RFC 0/6] Xilinx DMA enhancements and optimization Radhey Shyam Pandey
2018-04-02 10:39 ` Radhey Shyam Pandey [this message]
2018-04-11 9:05 ` [RFC 1/6] dt-bindings: dma: xilinx_dma: Add optional property has_axieth_connected Vinod Koul
2018-04-17 10:54 ` Radhey Shyam Pandey
2018-04-02 10:39 ` [RFC 2/6] dmaengine: xilinx_dma: Pass AXI4-Stream control words to netdev dma client Radhey Shyam Pandey
2018-04-11 9:08 ` Vinod Koul
2018-04-17 11:43 ` Radhey Shyam Pandey
2018-04-17 12:54 ` Lars-Peter Clausen
2018-04-17 13:46 ` Peter Ujfalusi
2018-04-17 13:58 ` Lars-Peter Clausen
2018-04-17 14:53 ` Peter Ujfalusi
2018-04-17 15:54 ` Lars-Peter Clausen
2018-04-18 6:31 ` Peter Ujfalusi
2018-04-18 13:06 ` Lars-Peter Clausen
2018-04-19 11:40 ` Peter Ujfalusi
2018-04-24 3:55 ` Vinod Koul
2018-04-24 9:50 ` Peter Ujfalusi
2018-05-17 6:39 ` Radhey Shyam Pandey
2018-05-29 15:04 ` Peter Ujfalusi
2018-05-30 17:29 ` Radhey Shyam Pandey
2018-06-01 10:17 ` Peter Ujfalusi
2018-06-01 10:24 ` [RFC] dmaengine: Add metadat_ops for dma_async_tx_descriptor Peter Ujfalusi
2018-07-02 6:59 ` Radhey Shyam Pandey
2018-07-10 5:52 ` Vinod
2018-07-18 10:06 ` Peter Ujfalusi
2018-07-19 9:22 ` Vinod
2018-07-20 13:42 ` Peter Ujfalusi
2018-07-24 11:14 ` Vinod
2018-07-30 9:46 ` Peter Ujfalusi
2018-07-31 4:29 ` Vinod
2018-04-17 15:42 ` [RFC 2/6] dmaengine: xilinx_dma: Pass AXI4-Stream control words to netdev dma client Vinod Koul
2018-04-17 15:44 ` Lars-Peter Clausen
2018-04-18 6:39 ` Peter Ujfalusi
2018-04-18 7:03 ` Peter Ujfalusi
2018-04-02 10:39 ` [RFC 3/6] dmaengine: xilinx_dma: Increase AXI DMA transaction segment count Radhey Shyam Pandey
2018-04-02 10:39 ` [RFC 4/6] dmaengine: xilinx_dma: Freeup active list based on descriptor completion bit Radhey Shyam Pandey
2018-04-11 9:11 ` Vinod Koul
2018-04-17 12:28 ` Radhey Shyam Pandey
2018-04-23 5:23 ` Vinod Koul
2018-04-02 10:39 ` [RFC 5/6] dmaengine: xilinx_dma: Program interrupt delay timeout Radhey Shyam Pandey
2018-04-11 9:11 ` Vinod Koul
2018-04-17 12:48 ` Radhey Shyam Pandey
2018-04-02 10:39 ` [RFC 6/6] dmaengine: xilinx_dma: Use tasklet_hi_schedule for timing critical usecase Radhey Shyam Pandey
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