From: Radhey Shyam Pandey <radheys@xilinx.com>
To: Peter Ujfalusi <peter.ujfalusi@ti.com>,
"vkoul@kernel.org" <vkoul@kernel.org>
Cc: "lars@metafoo.de" <lars@metafoo.de>,
Michal Simek <michals@xilinx.com>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
"dmaengine@vger.kernel.org" <dmaengine@vger.kernel.org>,
"dan.j.williams@intel.com" <dan.j.williams@intel.com>,
Appana Durga Kedareswara Rao <appanad@xilinx.com>,
"linux-arm-kernel@lists.infradead.org"
<linux-arm-kernel@lists.infradead.org>
Subject: RE: [RFC] dmaengine: Add metadat_ops for dma_async_tx_descriptor
Date: Mon, 2 Jul 2018 06:59:58 +0000 [thread overview]
Message-ID: <DM6PR02MB4361262830FF320B16B8486AC7430@DM6PR02MB4361.namprd02.prod.outlook.com> (raw)
In-Reply-To: <20180601102429.16429-1-peter.ujfalusi@ti.com>
> -----Original Message-----
> From: Peter Ujfalusi [mailto:peter.ujfalusi@ti.com]
> Sent: Friday, June 1, 2018 3:54 PM
> To: Radhey Shyam Pandey <radheys@xilinx.com>; vinod.koul@intel.com
> Cc: lars@metafoo.de; michal.simek@xilinx.com; linux-
> kernel@vger.kernel.org; dmaengine@vger.kernel.org;
> dan.j.williams@intel.com; Appana Durga Kedareswara Rao
> <appanad@xilinx.com>; linux-arm-kernel@lists.infradead.org
> Subject: [RFC] dmaengine: Add metadat_ops for dma_async_tx_descriptor
>
> If the DMA supports per descriptor metadata it can implement the attach,
> get_ptr/set_len callbacks.
>
> Client drivers must only use either attach or get_ptr/set_len to avoid
> miss configuration.
>
> Wrappers are also added for the metadata_ops:
> dmaengine_desc_attach_metadata()
> dmaengine_desc_get_metadata_ptr()
> dmaengine_desc_set_metadata_len()
>
> Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
> ---
> Hi,
>
> since attachments are bouncing back, I send the patch separately
>
> Regards,
> Peter
>
> include/linux/dmaengine.h | 50
> +++++++++++++++++++++++++++++++++++++++
> 1 file changed, 50 insertions(+)
>
> diff --git a/include/linux/dmaengine.h b/include/linux/dmaengine.h
> index 51fbb861e84b..ac42ace36aa3 100644
> --- a/include/linux/dmaengine.h
> +++ b/include/linux/dmaengine.h
> @@ -491,6 +491,18 @@ struct dmaengine_unmap_data {
> dma_addr_t addr[0];
> };
>
> +struct dma_async_tx_descriptor;
> +
> +struct dma_descriptor_metadata_ops {
> + int (*attach)(struct dma_async_tx_descriptor *desc, void *data,
> + size_t len);
> +
> + void *(*get_ptr)(struct dma_async_tx_descriptor *desc,
> + size_t *payload_len, size_t *max_len);
> + int (*set_len)(struct dma_async_tx_descriptor *desc,
> + size_t payload_len);
> +};
> +
> /**
> * struct dma_async_tx_descriptor - async transaction descriptor
> * ---dma generic offload fields---
> @@ -520,6 +532,7 @@ struct dma_async_tx_descriptor {
> dma_async_tx_callback_result callback_result;
> void *callback_param;
> struct dmaengine_unmap_data *unmap;
> + struct dma_descriptor_metadata_ops *metadata_ops;
> #ifdef CONFIG_ASYNC_TX_ENABLE_CHANNEL_SWITCH
> struct dma_async_tx_descriptor *next;
> struct dma_async_tx_descriptor *parent;
> @@ -932,6 +945,43 @@ static inline struct dma_async_tx_descriptor
> *dmaengine_prep_dma_memcpy(
> len, flags);
> }
>
> +static inline int dmaengine_desc_attach_metadata(
> + struct dma_async_tx_descriptor *desc, void *data, size_t
> len)
> +{
> + if (!desc)
> + return 0;
> +
> + if (!desc->metadata_ops || !desc->metadata_ops->attach)
> + return -ENOTSUPP;
> +
> + return desc->metadata_ops->attach(desc, data, len);
> +}
> +
> +static inline void *dmaengine_desc_get_metadata_ptr(
> + struct dma_async_tx_descriptor *desc, size_t *payload_len,
> + size_t *max_len)
> +{
> + if (!desc)
> + return NULL;
> +
> + if (!desc->metadata_ops || !desc->metadata_ops->get_ptr)
> + return ERR_PTR(-ENOTSUPP);
> +
> + return desc->metadata_ops->get_ptr(desc, payload_len, max_len);
> +}
> +
> +static inline int dmaengine_desc_set_metadata_len(
> + struct dma_async_tx_descriptor *desc, size_t payload_len)
> +{
> + if (!desc)
> + return 0;
> +
> + if (!desc->metadata_ops || !desc->metadata_ops->set_len)
> + return -ENOTSUPP;
> +
> + return desc->metadata_ops->set_len(desc, payload_len);
> +}
> +
Thanks for the RFC patchset. It looks fine to me. We also need to update
documentation. Let's wait for Vinod/Lars feedback.
> /**
> * dmaengine_terminate_all() - Terminate all active DMA transfers
> * @chan: The channel for which to terminate the transfers
> --
> Peter
>
> Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki.
> Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki
next prev parent reply other threads:[~2018-07-02 7:00 UTC|newest]
Thread overview: 43+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-04-02 10:39 [RFC 0/6] Xilinx DMA enhancements and optimization Radhey Shyam Pandey
2018-04-02 10:39 ` [RFC 1/6] dt-bindings: dma: xilinx_dma: Add optional property has_axieth_connected Radhey Shyam Pandey
2018-04-11 9:05 ` Vinod Koul
2018-04-17 10:54 ` Radhey Shyam Pandey
2018-04-02 10:39 ` [RFC 2/6] dmaengine: xilinx_dma: Pass AXI4-Stream control words to netdev dma client Radhey Shyam Pandey
2018-04-11 9:08 ` Vinod Koul
2018-04-17 11:43 ` Radhey Shyam Pandey
2018-04-17 12:54 ` Lars-Peter Clausen
2018-04-17 13:46 ` Peter Ujfalusi
2018-04-17 13:58 ` Lars-Peter Clausen
2018-04-17 14:53 ` Peter Ujfalusi
2018-04-17 15:54 ` Lars-Peter Clausen
2018-04-18 6:31 ` Peter Ujfalusi
2018-04-18 13:06 ` Lars-Peter Clausen
2018-04-19 11:40 ` Peter Ujfalusi
2018-04-24 3:55 ` Vinod Koul
2018-04-24 9:50 ` Peter Ujfalusi
2018-05-17 6:39 ` Radhey Shyam Pandey
2018-05-29 15:04 ` Peter Ujfalusi
2018-05-30 17:29 ` Radhey Shyam Pandey
2018-06-01 10:17 ` Peter Ujfalusi
2018-06-01 10:24 ` [RFC] dmaengine: Add metadat_ops for dma_async_tx_descriptor Peter Ujfalusi
2018-07-02 6:59 ` Radhey Shyam Pandey [this message]
2018-07-10 5:52 ` Vinod
2018-07-18 10:06 ` Peter Ujfalusi
2018-07-19 9:22 ` Vinod
2018-07-20 13:42 ` Peter Ujfalusi
2018-07-24 11:14 ` Vinod
2018-07-30 9:46 ` Peter Ujfalusi
2018-07-31 4:29 ` Vinod
2018-04-17 15:42 ` [RFC 2/6] dmaengine: xilinx_dma: Pass AXI4-Stream control words to netdev dma client Vinod Koul
2018-04-17 15:44 ` Lars-Peter Clausen
2018-04-18 6:39 ` Peter Ujfalusi
2018-04-18 7:03 ` Peter Ujfalusi
2018-04-02 10:39 ` [RFC 3/6] dmaengine: xilinx_dma: Increase AXI DMA transaction segment count Radhey Shyam Pandey
2018-04-02 10:39 ` [RFC 4/6] dmaengine: xilinx_dma: Freeup active list based on descriptor completion bit Radhey Shyam Pandey
2018-04-11 9:11 ` Vinod Koul
2018-04-17 12:28 ` Radhey Shyam Pandey
2018-04-23 5:23 ` Vinod Koul
2018-04-02 10:39 ` [RFC 5/6] dmaengine: xilinx_dma: Program interrupt delay timeout Radhey Shyam Pandey
2018-04-11 9:11 ` Vinod Koul
2018-04-17 12:48 ` Radhey Shyam Pandey
2018-04-02 10:39 ` [RFC 6/6] dmaengine: xilinx_dma: Use tasklet_hi_schedule for timing critical usecase Radhey Shyam Pandey
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