* [RESEND PATCH] mmc: tegra: enable ddr_signaling for MMC_TIMING_MMC_DDR52
@ 2018-07-12 17:38 Tamás Szűcs
2018-07-12 20:28 ` Marcel Ziswiler
0 siblings, 1 reply; 2+ messages in thread
From: Tamás Szűcs @ 2018-07-12 17:38 UTC (permalink / raw)
To: Adrian Hunter, Ulf Hansson
Cc: Thierry Reding, Jonathan Hunter, linux-mmc, linux-tegra, linux-kernel
This fixes sampling errors with eMMC modules using DDR52 when host capabilities
via setting NVQUIRK_ENABLE_DDR50 and NVQUIRK_ENABLE_SDHCI_SPEC_300 are enabled.
Signed-off-by: Tamás Szűcs <tszucs@protonmail.ch>
---
drivers/mmc/host/sdhci-tegra.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/mmc/host/sdhci-tegra.c b/drivers/mmc/host/sdhci-tegra.c
index 970d38f68939..a3bfaa7067c8 100644
--- a/drivers/mmc/host/sdhci-tegra.c
+++ b/drivers/mmc/host/sdhci-tegra.c
@@ -228,7 +228,7 @@ static void tegra_sdhci_set_uhs_signaling(struct sdhci_host *host,
struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
struct sdhci_tegra *tegra_host = sdhci_pltfm_priv(pltfm_host);
- if (timing == MMC_TIMING_UHS_DDR50)
+ if (timing == MMC_TIMING_UHS_DDR50 || timing == MMC_TIMING_MMC_DDR52)
tegra_host->ddr_signaling = true;
sdhci_set_uhs_signaling(host, timing);
--
2.11.0
^ permalink raw reply [flat|nested] 2+ messages in thread
* Re: [RESEND PATCH] mmc: tegra: enable ddr_signaling for MMC_TIMING_MMC_DDR52
2018-07-12 17:38 [RESEND PATCH] mmc: tegra: enable ddr_signaling for MMC_TIMING_MMC_DDR52 Tamás Szűcs
@ 2018-07-12 20:28 ` Marcel Ziswiler
0 siblings, 0 replies; 2+ messages in thread
From: Marcel Ziswiler @ 2018-07-12 20:28 UTC (permalink / raw)
To: tszucs, ulf.hansson, adrian.hunter
Cc: jonathanh, linux-mmc, linux-kernel, thierry.reding, linux-tegra
On Thu, 2018-07-12 at 19:38 +0200, Tamás Szűcs wrote:
> This fixes sampling errors with eMMC modules using DDR52 when host
> capabilities
> via setting NVQUIRK_ENABLE_DDR50 and NVQUIRK_ENABLE_SDHCI_SPEC_300
> are enabled.
>
> Signed-off-by: Tamás Szűcs <tszucs@protonmail.ch>
> ---
> drivers/mmc/host/sdhci-tegra.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/mmc/host/sdhci-tegra.c b/drivers/mmc/host/sdhci-
> tegra.c
> index 970d38f68939..a3bfaa7067c8 100644
> --- a/drivers/mmc/host/sdhci-tegra.c
> +++ b/drivers/mmc/host/sdhci-tegra.c
> @@ -228,7 +228,7 @@ static void tegra_sdhci_set_uhs_signaling(struct
> sdhci_host *host,
> struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
> struct sdhci_tegra *tegra_host =
> sdhci_pltfm_priv(pltfm_host);
>
> - if (timing == MMC_TIMING_UHS_DDR50)
> + if (timing == MMC_TIMING_UHS_DDR50 || timing ==
> MMC_TIMING_MMC_DDR52)
> tegra_host->ddr_signaling = true;
>
> sdhci_set_uhs_signaling(host, timing);
This is really a duplicate of Stefan's "[PATCH 2/3] mmc: tegra: fix eMMC DDR52
mode" [1] resp. Stefan's is a duplicate of Tamás'. We missed it as it somehow
bounced the tegra mailing list. We basically investigated this upon Tamás'
request (u-blox being our customer) more or less in parallel.
[1] https://lore.kernel.org/lkml/20180712073904.4705-2-stefan@agner.ch
^ permalink raw reply [flat|nested] 2+ messages in thread
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2018-07-12 17:38 [RESEND PATCH] mmc: tegra: enable ddr_signaling for MMC_TIMING_MMC_DDR52 Tamás Szűcs
2018-07-12 20:28 ` Marcel Ziswiler
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