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From: Vladimir Kondratiev <Vladimir.Kondratiev@mobileye.com>
To: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
Cc: Anup Patel <anup@brainfault.org>,
	Thomas Gleixner <tglx@kernel.org>, Radu Rendec <radu@rendec.net>,
	Paul Walmsley <pjw@kernel.org>,
	Palmer Dabbelt <palmer@dabbelt.com>,
	Albert Ou <aou@eecs.berkeley.edu>,
	Alexandre Ghiti <alex@ghiti.fr>,
	Clark Williams <clrkwllms@kernel.org>,
	Steven Rostedt <rostedt@goodmis.org>,
	Jessica Liu <liu.xuemei1@zte.com.cn>,
	linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org,
	linux-rt-devel@lists.linux.dev
Subject: Re: [PATCH v3] irqchip/riscv-aplic: fix asynchronous probing
Date: Thu, 15 Oct 2026 16:52:51 +0300	[thread overview]
Message-ID: <15394ce1-a191-4066-9c91-d69b84ea62b9@mobileye.com> (raw)
In-Reply-To: <20261015095605.pIRkhzUR@linutronix.de>

On 10/15/26 12:56, Sebastian Andrzej Siewior wrote:
> EXTERNAL EMAIL: Do not click any links or open any attachments unless you trust the sender and know the content is safe.
> 
> On 2026-10-15 11:11:24 [+0300], Vladimir Kondratiev wrote:
>> On 10/15/26 09:32, Sebastian Andrzej Siewior wrote:
>>> The driver providing MSI capabilities (the MSI domain for this device)
>>> must a module. This is the requirement so that _this_ driver returns
>>> EPROBE_DEFER and *then* once the MSI domain driver is loaded as a module
>>> (after boot) this driver is probed again and succeeds.
>> Why module? for "riscv-aplic", "msi-parent" shall be "riscv-imsic" and
>> it is "builtin_platform_driver", see
>> drivers/irqchip/irq-riscv-imsic-platform.c
> 
> But _how_ do you want to make deferred probing happen that will change
> aplic_syscore_registered after init without using modules?
> 

This is how. I provide a counter-example. To model supplier that will
not be satisfied I added fake "clocks". I know there's no "clocks" in
the aplic bindings, this is simply to model supplier that takes long
time. In the real life it should be the msi-parent that takes forever to
probe.

DTS modified like this, it has 3 aplic_m/aplic_s pairs, I show here only
modifications:

/ {
	soc {
		aplic_late_supplier: aplic-late-supplier {
			compatible = "test,aplic-late-supplier";
			#clock-cells = <0>;
		};
	};
};
&aplic_s0 { clocks = <&aplic_late_supplier>; };
&aplic_s1 { clocks = <&aplic_late_supplier>; };
&aplic_s2 { clocks = <&aplic_late_supplier>; };
&aplic_m0 { clocks = <&aplic_late_supplier>; };
&aplic_m1 { clocks = <&aplic_late_supplier>; };
&aplic_m2 { clocks = <&aplic_late_supplier>; };

It fails on boot, real test with QEMU:

[    1.940204] Freeing unused kernel image (initmem) memory: 2328K
[    1.940774] Run /init as init process
[   10.874635] riscv-aplic 48760000.interrupt-controller: 257 interrupts
directly connected to 8 CPUs
[   10.874892] Unable to handle kernel paging request at virtual address
ffffffff80e04fc4
[   10.875059] [ffffffff80e04fc4] pgd=000000023fffe801,
p4d=000000023fffe801, pud=000000023fffe801, pmd=00000002004000e3
[   10.875407] Oops [#1]
[   10.875806] Workqueue: events_unbound deferred_probe_work_func
[   10.875961] epc : aplic_probe+0xd8/0xfa
[   10.876153] status: 0000000200000120 badaddr: ffffffff80e04fc4 cause:
000000000000000f
[   10.876210] [<ffffffff804ca134>] aplic_probe+0xd8/0xfa
[   10.876252] [<ffffffff80559b4e>] platform_probe+0x3e/0x7a
[   10.876262] [<ffffffff8055733a>] really_probe+0x88/0x35c
...
[   10.876349] [<ffffffff80556f9a>] deferred_probe_work_func+0x92/0xfe
[   10.876360] [<ffffffff800448aa>] process_one_work+0x150/0x3d4

cause: 0xf is a store page fault; the PMD 0x...e3 has V|R|X|A|D but not
W, i.e. the rodata mapping after mark_rodata_ro(). The faulting
instruction is the store from aplic_syscore_init() (inlined into
aplic_probe):

ffffffff804ca12a:	jal	ffffffff80558216 <register_syscore>
ffffffff804ca12e:	li	a5,1
ffffffff804ca130:	auipc	a4,0x93b
ffffffff804ca134:	sb	a5,-364(a4) # ffffffff80e04fc4
<aplic_syscore_registered>

      reply	other threads:[~2026-10-15 13:52 UTC|newest]

Thread overview: 9+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-10-12  9:12 Vladimir Kondratiev
2026-10-13 15:27 ` Sebastian Andrzej Siewior
2026-10-14  8:15   ` Vladimir Kondratiev
2026-10-14 10:53     ` Sebastian Andrzej Siewior
2026-10-15  6:19       ` Vladimir Kondratiev
2026-10-15  6:32         ` Sebastian Andrzej Siewior
2026-10-15  8:11           ` Vladimir Kondratiev
2026-10-15  9:56             ` Sebastian Andrzej Siewior
2026-10-15 13:52               ` Vladimir Kondratiev [this message]

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