From: Wesley Sheng <wesley.sheng@microchip.com>
To: <kurt.schwemmer@microsemi.com>, <logang@deltatee.com>,
<jdmason@kudzu.us>, <dave.jiang@intel.com>, <allenbh@gmail.com>,
<linux-pci@vger.kernel.org>, <linux-ntb@googlegroups.com>,
<linux-kernel@vger.kernel.org>
Cc: <wesleyshenggit@sina.com>, <wesley.sheng@microchip.com>
Subject: [PATCH v2 0/3] ntb_hw_switchtec: Added support of >=4G memory windows
Date: Thu, 6 Dec 2018 21:30:49 +0800 [thread overview]
Message-ID: <1544103052-28191-1-git-send-email-wesley.sheng@microchip.com> (raw)
Hi, Everyone,
This patch series adds support of >=4G memory windows.
Current Switchtec's BAR setup registers are limited to 32bits,
corresponding to the maximum MW (memory window) size is <4G.
Increase the MW sizes with the addition of the BAR Setup Extension
Register for the upper 32bits of a 64bits MW size. This increases the MW
range to between 4K and 2^63.
Additionally, we've made the following changes:
* debug print 64bit aligned crosslink BAR numbers
* Fix the array size of NT req id mapping table
Tested with ntb_test.sh successfully based on NTB fixes series from
Logan Gunthorpe <logang@deltatee.com> at
https://github.com/sbates130272/linux-p2pmem on branch of
ntb_multiport_fixes
Regards,
Wesley
--
Changed since v1:
- Using upper_32_bits() and lower_32_bits() marcos makes it easier
to read and avoids compiler warning on 32-bit arch
- Reorder the patches to make the bug fixes first and add a "Fixes"
line to the commit messages
--
Paul Selles (2):
ntb_hw_switchtec: debug print 64bit aligned crosslink BAR Numbers
ntb_hw_switchtec: Added support of >=4G memory windows
Wesley Sheng (1):
ntb_hw_switchtec: NT req id mapping table register entry number should
be 512
drivers/ntb/hw/mscc/ntb_hw_switchtec.c | 11 ++++++++---
include/linux/switchtec.h | 10 +++++++---
2 files changed, 15 insertions(+), 6 deletions(-)
--
2.7.4
next reply other threads:[~2018-12-06 7:33 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-12-06 13:30 Wesley Sheng [this message]
2018-12-06 13:30 ` [PATCH v2 1/3] ntb_hw_switchtec: debug print 64bit aligned crosslink BAR Numbers Wesley Sheng
2018-12-06 13:30 ` [PATCH v2 2/3] ntb_hw_switchtec: NT req id mapping table register entry number should be 512 Wesley Sheng
2018-12-06 13:30 ` [PATCH v2 3/3] ntb_hw_switchtec: Added support of >=4G memory windows Wesley Sheng
2018-12-12 23:00 ` [PATCH v2 0/3] " Jon Mason
2018-12-12 23:42 ` Logan Gunthorpe
2018-12-12 23:57 ` Jon Mason
2018-12-13 0:01 ` Logan Gunthorpe
2018-12-13 0:25 ` Jon Mason
2018-12-13 0:32 ` Logan Gunthorpe
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